UPD77111 NEC, UPD77111 Datasheet - Page 38
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UPD77111
Manufacturer Part Number
UPD77111
Description
16-BIT FIXED-POINT DIGITAL SIGNAL PROCESSORS
Manufacturer
NEC
Datasheet
1.UPD77111.pdf
(80 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD77111F1-002-CN1
Manufacturer:
SAMSUNG
Quantity:
96 887
Part Number:
UPD77111F1-002-CN1
Manufacturer:
NEC
Quantity:
20 000
38
Instruc-
tion
Load/
store
Register-
to-register
transfer
Immediate
value
setting
Notes 1. Of the two mnemonics, either one of them or both can be written.
Parallel
load/store
Partial load/
store
Direct
addressing
load/store
Immediate
value index
load/store
Register-to-
register
transfer
Immediate
value setting
2. After transfer, modification specified by mod is performed.
3. Select any of dest, dest’ = {ro, reh, re, rh, rl}, source, source’ = {re, rh, rl}.
4. Select any of dest = {ro, reh, re, rh, rl}, source = {re, rh, rl},
5. Select any of dest = {ro, reh, re, rh, rl}, source = {re, rh, rl}.
6. Select any register other than general-purpose registers as dest and source.
Instruction
Name
Notes 1, 2, 3
Note 6
Notes 1, 2
Note 4
Note 5
ro = *dpx_mod ro =
*dpy_mod
ro = *dpx_mod
*dpy_mod = rh
*dpx_mod = rh ro =
*dpy_mod
*dpx_mod = rh
*dpy_mod = rh
dest = *dpx_mod
dest = *dpy_mod
dest = *dpx_mod
*dpy_mod = source
*dpx_mod = source
dest = *dpy_mod
*dpx_mod = source
*dpy_mod = source
dest = *addr
*addr = source
dest = *dp_imm
*dp_imm = source
dest = rl
rl = source
rl = imm
(where imm = 0 to 0xFFFF)
dp = imm
(where imm = 0 to 0xFFFF)
dn = imm
(where imm = 0 to 0xFFFF)
dm = imm
(where imm = 1 to 0xFFFF)
Mnemonic
Data Sheet U12801EJ4V0DS00
ro
ro
*dpx
*dpx
dest
dest
dest
*dpy
*dpx
dest
*dpx
*dpy
dest
*addr
dest
*dp
dest
rl
rl
dp
dn
dm
source
imm
*dpx, ro
*dpx, *dpy
Operation
imm
imm
imm
source
rh, ro
rh, *dpy
*dpx,
*dpx,
*dpy
*addr
*dp
rl
source
source,
source,
source
*dpy
source
*dpy
*dpy
rh
rh
Trino-
mial
{
Bino-
mial
addr =
{
Instructions Simultaneously Written
Unino-
minal
{
0: X-0xFFF
0: Y-0xFFFF
Load/
store
PD77110, 77111, 77112
Trans-
fer
Imme-
diate-
value
: X (X memory)
: Y (Y memory)
Bran-
ch
Loop
Cont-
rol
{
Flag
.
OV
z
z
z
z
z
z