UPD78320GJ-5BJ NEC, UPD78320GJ-5BJ Datasheet - Page 31

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UPD78320GJ-5BJ

Manufacturer Part Number
UPD78320GJ-5BJ
Description
16/8-BIT SINGLE-CHIP MICROCONTROLLER
Manufacturer
NEC
Datasheet
3. BLOCK FUNCTIONS
3.1
If no bus cycle startup request is made from the EXU, a prefetch address is generated and instruction prefetch is carried
out. The prefetched operation code is fetched into the instruction queue.
3.2
byte RAM is built in the EXU.
3.3
ROM.
3.4
serviced by the context switch, vectored interrupt or macro service function.
In the BCU, the necessary bus cycle is started according to the physical address obtained by the execution unit (EXU).
In the EXU, address calculation, arithmetic logical operation and data transfer are controlled by microprograms. A 256-
The 256-byte main RAM in the EXU is accessible by the relevant instruction faster than peripheral RAM (384 bytes).
This block consists of a 16K-byte ROM and a 384-byte peripheral RAM. However, the PD78320 does not incorporate
ROM access can be disabled by EA pin.
Various interrupt requests (NMI, INTP0 to INTP6) generated either externally or from the peripheral hardware are
The 3-level interrupt priority is also specified.
BUS CONTROL UNIT (BCU)
EXECUTION UNIT (EXU)
ROM/RAM
INTERRUPT CONTROLLER
PD78320, 78322
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