AN1769 Freescale Semiconductor / Motorola, AN1769 Datasheet - Page 23

• Manufacturer Part Number: AN1769
• Description: Designing a Minimal PowerPC System
• Manufacturer: Freescale Semiconductor / Motorola

MOTOROLA
END BEHAVIOR;
--LIBRARY LAT_VHD;
--USE LAT_VHD.VHD_PKG.ALL;
LIBRARY ieee;
USE ieee.std_logic_1164.all;
LIBRARY synth;
END PROCESS;
PROCESS (BEAT4,ERROR)
BEGIN
END PROCESS;
PROCESS (CLAIM_L,DESEL,IDLE,SCS_L)
BEGIN
END PROCESS;
PROCESS (BEAT1,BEAT2,BEAT4,BURST,TBST_L,WE_L)
BEGIN
END PROCESS;
PROCESS (BEAT1,BEAT2,BEAT3,BEAT4,BURST,TBST_L,WE_L)
BEGIN
END PROCESS;
PROCESS (ERROR)
BEGIN
END PROCESS;
next_TIMER3 <= TIMER(3);
next_TIMER2 <= TIMER(2);
next_TIMER1 <= TIMER(1);
next_TIMER0 <= TIMER(0);
IF (( (BEAT4='0')AND (ERROR='0'))) THEN AACK_L<='1';
ELSE AACK_L<='0';
END IF;
IF (( CLAIM_L='1' AND (DESEL='0')) OR ( SCS_L='1' AND (DESEL='0')) OR (
ELSE ADSC_L<='0';
END IF;
IF (( (BURST='0')AND (BEAT1='0')AND (BEAT2='0')AND (BEAT4='0')) OR (
ELSE BAA_L<='0';
END IF;
IF (( (BEAT1='0')AND (BEAT2='0')AND (BEAT3='0')AND (BEAT4='0')AND
ELSE TA_L<='0';
END IF;
IF (( (ERROR='0'))) THEN TEA_L<='1';
ELSE TEA_L<='0';
END IF;
CLOCK& CLOCK& CLOCK& CLOCK)) AND (( ( TIMER3& TIMER3& TIMER3& TIMER3)) OR (
&TIMER0)) - ("0001") ) ) OR (( ( COUNT& COUNT& COUNT& COUNT)) AND (
("1111") ) AND (( (TIMER3 &TIMER2 &TIMER1 &TIMER0)) - ("0001") ) ) OR ((
( CLOCK& CLOCK& CLOCK& CLOCK)) AND (( ( NOT TIMER0& NOT TIMER0& NOT TIMER0&
TIMER2& NOT TIMER2& NOT TIMER2& NOT TIMER2)AND ( NOT TIMER3& NOT TIMER3& NOT
) AND (( ( DOERR_L& DOERR_L& DOERR_L& DOERR_L)AND ( SCS_L& SCS_L& SCS_L&
SCS_L)AND ( NOT CLAIM_L& NOT CLAIM_L& NOT CLAIM_L& NOT CLAIM_L)AND ( TBST_L
& TBST_L& TBST_L& TBST_L)) ) AND (( (CTIME3 &CTIME2 &CTIME1 &CTIME0)) ) )
OR (( ( DESEL& DESEL& DESEL& DESEL)) AND ( ("1111") ) AND ( ("0000") ) )
OR (( ( ERROR& ERROR& ERROR& ERROR)) AND ( ("1111") ) AND ( ("0000") ) )
OR (( ( IDLE& IDLE& IDLE& IDLE)) AND (( ( NOT DOERR_L& NOT DOERR_L& NOT
DOERR_L& NOT DOERR_L)) ) AND ( ("0000") ) ) OR (( ( IDLE& IDLE& IDLE& IDLE
)) AND (( ( DOERR_L& DOERR_L& DOERR_L& DOERR_L)AND ( NOT CLAIM_L& NOT
CLAIM_L& NOT CLAIM_L& NOT CLAIM_L)AND ( NOT SCS_L& NOT SCS_L& NOT SCS_L& NOT
( IDLE& IDLE& IDLE& IDLE)) AND (( ( DOERR_L& DOERR_L& DOERR_L& DOERR_L)AND
CLAIM_L& NOT CLAIM_L& NOT CLAIM_L)AND ( NOT SCS_L& NOT SCS_L& NOT SCS_L& NOT
DOERR_L& DOERR_L& DOERR_L& DOERR_L)AND ( CLAIM_L& CLAIM_L& CLAIM_L& CLAIM_L)
) OR ( ( DOERR_L& DOERR_L& DOERR_L& DOERR_L)AND ( SCS_L& SCS_L& SCS_L&
SCS_L)AND ( NOT TBST_L& NOT TBST_L& NOT TBST_L& NOT TBST_L)) ) AND (
("0000") ) ) OR (( ( SINGLE& SINGLE& SINGLE& SINGLE)) AND ( ("1111") ) AND
(IDLE='0')AND (DESEL='0'))) THEN ADSC_L<='1';
(BURST='0')AND (BEAT1='0')AND (BEAT2='0')AND WE_L='1' ) OR ( (BURST='0')
AND (BEAT1='0')AND (BEAT2='0')AND TBST_L='1' )) THEN BAA_L<='1';
TBST_L='1' AND (BURST='0')) OR ( (BEAT1='0')AND (BEAT2='0')AND (BEAT3='0'
)AND (BEAT4='0')AND WE_L='1' )) THEN TA_L<='1';
OR ( ( TIMER0& TIMER0& TIMER0& TIMER0)) ) AND (( (TIMER3 &TIMER2 &TIMER1
NOT TIMER0)AND ( NOT TIMER1& NOT TIMER1& NOT TIMER1& NOT TIMER1)AND ( NOT
TIMER3& NOT TIMER3)) ) AND ( ("0000") ) ) OR (( ( IDLE& IDLE& IDLE& IDLE)
SCS_L)AND ( TBST_L& TBST_L& TBST_L& TBST_L)) ) AND ( ("0000") ) ) OR ((
( NOT TBST_L& NOT TBST_L& NOT TBST_L& NOT TBST_L)AND ( NOT CLAIM_L& NOT
SCS_L)) ) AND ( ("0000") ) ) OR (( ( IDLE& IDLE& IDLE& IDLE)) AND (( (
( TIMER2& TIMER2& TIMER2& TIMER2)) OR ( ( TIMER1& TIMER1& TIMER1& TIMER1))
( ("0000") ) );
Freescale Semiconductor, Inc.
For More Information On This Product,
Minimal PowerPC System Design
Go to: www.freescale.com
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