AN1769 Freescale Semiconductor / Motorola, AN1769 Datasheet - Page 6

• Manufacturer Part Number: AN1769
• Description: Designing a Minimal PowerPC System
• Manufacturer: Freescale Semiconductor / Motorola

The system address map is shown in Table 2.
The only challenging design problem faced is the handling of burst transfers. The MPC60x family can
operate with caches disabled, thus preventing burst transfers, but this typically exacts a terrible penalty in
performance that makes the additional effort at handling them well worthwhile. The Þrst step in designing
the memory controller (abbreviated MC in code) is to determine the types of controls that will be needed
among the proposed memory devicesÑFlash EPROMs, SRAM and general I/O.
6
TT
TSIZ
MPC60x
Memory Controller
RAM
Fast I/O
Slow I/O
Flash
Devices
TBST
TS
0xC000_0000
0x0000_0000
0x4000_0000
0x8000_0000
Figure 3. Minimal System Memory Architecture
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Minimal PowerPC System Design
TA
BWE(0:7)
Table 2. Excimer Address Map
A(0:31)
D(0:63)
ADSC
BAA
Address
TEA
OEx
CEx
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0xBFFF_FFFF
0x3FFF_FFFF
0x7FFF_FFFF
0xFFFF_FFFF
End
Burstable?
N
N
N
Y
32-bit Pipelined Burst
16-bit FlashROM (4X)
SRAM (2X)
I/O Space
Access
Cycles
3-1-1-1
12
4
6
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