FDC37M60X SMSC Corporation, FDC37M60X Datasheet - Page 65

• Manufacturer Part Number: FDC37M60X
• Description: ENHANCED SUPER I/O CONTROLLER WITH INFRARED SUPPORT
• Manufacturer: SMSC Corporation

LOCK
In order to protect systems with long DMA
latencies against older application software that
can disable the FIFO the LOCK Command has
been added.
used by the FDC routines, and application
software should refrain from using it.
application calls for the FIFO to be disabled
then the CONFIGURE command should be
used.
The LOCK command defines whether the
EFIFO, FIFOTHR, and PRETRK parameters of
the CONFIGURE command can be RESET by
the DOR and DSR registers. When the LOCK
bit is set to logic "1" all subsequent "software
RESETS by the DOR and DSR registers will not
change the previously set parameters to their
default values. All "hardware" RESET from the
RESET pin will set the LOCK bit to logic "0" and
return the EFIFO, FIFOTHR, and PRETRK to
their default values. A status byte is returned
immediately after issuing a a LOCK command.
This byte reflects the value of the LOCK bit set
by the command byte.
WGATE
This command should only be
0
0
1
1
GAP
0
1
0
1
Table 30 - Effects of WGATE and GAP Bits
Conventional
Perpendicular
(500 Kbps)
Reserved
(Conventional)
Perpendicular
(1 Mbps)
MODE
If an
65
GAP2 FORMAT
LENGTH OF
ENHANCED DUMPREG
The DUMPREG command is designed to
support
application software development and debug.
To accommodate the LOCK command and the
enhanced PERPENDICULAR MODE command
the eighth byte of the DUMPREG command has
been modified to contain the additional data
from these two commands.
COMPATIBILITY
The FDC37M60x was designed with software
compatibility in mind. It is a fully backwards-
compatible solution with the older generation
765A/B
implements on-board registers for compatibility
with the PS/2, as well as PC/AT and PC/XT,
floppy disk controller subsystems. After a
hardware reset of the FDC, all registers,
functions and enhancements default to a PC/AT,
PS/2 or PS/2 Model 30 compatible operating
mode, depending on how the IDENT and MFM
bits are configured by the system BIOS.
22 Bytes
22 Bytes
22 Bytes
41 Bytes
FIELD
disk
system
controllers.
BY WRITE DATA
GAP 2 WRITTEN
PORTION OF
OPERATION
run-time
19 Bytes
38 Bytes
0 Bytes
0 Bytes
The
diagnostics
FDC
also
and