AD8151-EVAL Analog Devices, AD8151-EVAL Datasheet
AD8151-EVAL
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AD8151-EVAL Summary of contents
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... It also operates at data rates in excess of 3.2 Gbps per port, making it suitable for Sonet OC-48 applications with 8/10-bit forward-error correction (FEC). Furthermore, the price of the AD8151 makes it affordable enough to be used for lower data rates. The AD8151’s flexible supply voltages allow the user to operate with either emitter-coupled logic (ECL) or positive emitter-coupled logic (PECL) data levels, and with 3 ...
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... AD8151 TABLE OF CONTENTS Features .............................................................................................. 1 Applications....................................................................................... 1 Functional Block Diagram .............................................................. 1 General Description ......................................................................... 1 Revision History ............................................................................... 2 Specifications..................................................................................... 3 Absolute Maximum Ratings............................................................ 4 Maximum Power Dissipation ..................................................... 4 ESD Caution.................................................................................. 4 Pin Configuration and Function Descriptions............................. 5 Typical Performance Characteristics ............................................. 9 Control Interface Truth Tables...................................................... 13 Control Interface Timing Diagrams ............................................ 14 Control Interface Programming Example .............................. 16 REVISION HISTORY 12/05— ...
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... Single-ended (see Figure 18) Differential (See Figure 19 All outputs enabled OUT MIN MAX All outputs disabled Rev Page AD8151 Min Typ Max Unit 2.5 3.2 Gbps 650 ps ±50 ±100 ps 100 ps 200 1000 ...
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... Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. MAXIMUM POWER DISSIPATION The maximum power that can be safely dissipated by the AD8151 is limited by the associated rise in junction temperature. The maximum safe junction temperature for plastic encapsulated devices is determined by the glass transition temperature of the plastic, approximately 150°C. ...
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... OUT16N 43 OUT16P 44 V A16 AD8151 184L LQFP TOP VIEW (Not to Scale) Figure 4. Pin Configuration Rev Page AD8151 138 V EE 137 IN12N 136 IN12P 135 V EE 134 IN11N 133 IN11P 132 V EE 131 IN10N 130 IN10P 129 ...
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... AD8151 Table 3. Pin Function Descriptions Pin No. Mnemonic 10, 13, 16, 19, 22, 25, 28, 31 34, 37, 40, 42, 46, 47, 92, 93, 99, 102, 105, 108, 111, 114, 117, 120, 123, 126, 129, 132, 135, 138, 139, 142, 145, 148, 172, 175, 178, 181, 184 2 IN20P ...
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... High Speed Input Complement PECL/ECL High Speed Input PECL/ECL High Speed Input Complement PECL/ECL High Speed Input PECL/ECL High Speed Input Complement PECL/ECL High Speed Input PECL/ECL High Speed Input Complement PECL/ECL High Speed Input PECL/ECL High Speed Input Complement Rev Page AD8151 ...
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... AD8151 Pin No. Mnemonic 130 IN10P 131 IN10N 133 IN11P 134 IN11N 136 IN12P 137 IN12N 140 IN13P 141 IN13N 143 IN14P 144 IN14N 146 IN15P 147 IN15N 150 V EE 151 REF 152 V SS 153 D6 154 D5 155 D4 156 D3 157 D2 158 D1 159 D0 160 ...
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... Rev Page 70ps/DIV Figure 8. Eye Pattern 3.2 Gbps, PRBS 23 p-p = 53ps STD DEV = 8ps 20ps/DIV Figure 9. Jitter @ 3.2 Gbps, PRBS 23 100 DATA RATE) OUT % EYE HEIGHT = 0.5Gbps OUT 0.5 1.0 1.5 2.0 2.5 DATA RATE (Gbps) Figure 10. Eye Height vs. Data Rate, PRBS 23 AD8151 × 100 3.0 3.5 ...
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... AD8151 100 PEAK-PEAK JITTER STANDARD DEVIATION 0 1.0 1.5 2.0 DATA RATE (Gbps) Figure 11. Jitter vs. Data Rate, PRBS 23 p-p = 38ps STD DEV = 7.7ps 100ps/DIV Figure 12. Crosstalk, 2.5 Gbps, PRBS 23, Attack Signal Is Off 100ps/DIV Figure 13. Crosstalk, 2.5 Gbps, PRBS 23, Attack Signal Is On 2.5 3.0 3.5 p-p = 70ps STD DEV = 8ps Rev ...
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... Figure 22. Jitter vs. V Rev Page AD8151 p-p = 43ps STD DEV = 8ps 1.1ns/DIV Figure 20. Response, 3.2 Gbps, 3.2Gbps 2.5Gbps –4.8 –4.6 –4.4 –4.2 –4.0 –3.8 –3.6 –3.4 –3.2 V (V) EE Figure 21. Jitter vs. Supply, PRBS 23 3.2Gbps –1.2 – ...
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... NORMALIZED TEMPERATURE (°C) Figure 25. Propagation Delay, Normalized at 25°C vs. Temperature PRBS 49.9Ω 1.65kΩ AD8151 P P –6dB DATA OUT 105Ω IN OUT N N DATA OUT –6dB 49.9Ω 1.65kΩ ...
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... Broadcast Connection. Connect all 17 outputs to same designated input and set all 17 enable bits to D6. Readback is not possible with the broadcast address Reserved. Any address or data code greater or equal to these are reserved for future expansion or factory testing. Rev Page AD8151 ...
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... AD8151 CONTROL INTERFACE TIMING DIAGRAMS CS INPUTS WE INPUTS A[4:0] INPUTS D[6:0] INPUTS Table 6. First Rank Write Cycle Parameter Mnemonic Description Setup Time t Chip select to write enable CSW t Address to write enable ASW t Data to write enable DSW Hold Time t Chip select from write enable CHW t Address from write enable ...
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... 3 CHR t RDD Conditions Min Typ T = 25° 3 kΩ D[6:0] 15 Bus 15 AD8151 Max Unit Max Unit ...
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... AD8151 RESET INPUTS DISABLING OUT[0:16][N:P] OUTPUTS Table 10. Asynchronous Reset Parameter Mnemonic Disable Time t TOD Width of Reset Pulse t TW CONTROL INTERFACE PROGRAMMING EXAMPLE The following conservative pattern connects all outputs to Input 7, except Output 16, which is connected to Input 32. The vector clock period ns possible to accelerate the execution of this pattern by deleting Vectors and 9. ...
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... OF 17 DECODERS RE A[0:4] Figure 32. Control Interface (Simplified Schematic) The AD8151 control interface receives and stores the desired connection matrix for the 33 input and 17 output signal pairs. The interface consists of 17 rows of double-rank 7-bit latches, 1 row for each output. The 7-bit data-word stored in each of these latches indicates to which (if any) of the 33 inputs the output is connected ...
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... It is useful to momentarily hold RESET at a logic low state when powering up the AD8151 in a system that has multiple output signal pairs connected together. Failure to do this can result in several signal outputs contending after power-up. The RESET pin is not gated by the state of the chip-select pin, CS ...
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... EE ECL SOURCE Figure 34. AD8151 Input Termination from ECL/PECL Sources: (a) Parallel Termination Using V If the AD8151 is driven from a current-mode output stage such as another AD8151, the input termination should be chosen to accommodate that type of source, as explained in the following section. High speed Data Outputs (OUTyyP, OUTyyN) The AD8151 has 17 pairs of differential current-mode outputs ...
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... Power Supplies There are several options for the power supply voltages for the AD8151, as there are two separate sections of the chip that require power supplies. These are the control logic and the high COM speed data paths. Depending on the system architecture, the voltage levels of these supplies can vary ...
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... GND Figure 40. Power Supplies and Bypassing for PECL Operation POWER DISSIPATION For analysis, the power dissipation of the AD8151 can be divided into three separate parts. These are the control logic, the data path circuits, and the (ECL or PECL) outputs, which are part of the data path circuits but can be dealt with separately ...
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... V parallel and close to the pin leads can provide an even lower thermal resistive path. If possible, use 2 oz copper foil to provide better heat removal than 1 oz copper foil. The AD8151 package has a specified thermal impedance θ . This is ...
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... A more generalized system can have more outputs bused and more receivers on the same bus, but the same concepts apply. The inputs of the AD8151 can also be considered as a receiver. The transmission lines that bus the devices together are shown with terminations at each end. ...
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... SS SS compatible with standard CMOS or TTL logic. V from and should be matched to the supply voltage of the logic used to control the AD8151. However, since PCs use 5 V logic on their parallel port, V should when using program the AD8151. ...
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... not known which driver is used best to select LPT1 and proceed to the next screen, which displays the buttons that allow the connection of inputs to outputs of the AD8151. All of the outputs should be in the output off state after the program starts running. Any of the active buttons can be selected by clicking the mouse, which sends out a burst of programming data ...
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... Type in an integer from and then click OK. AD8151 This sends out the proper program data and returns to the main screen with a full column of buttons selected under the chosen input ...
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... Figure 43. Component Side Rev Page AD8151 ...
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... AD8151 Figure 44. Circuit Side Rev Page ...
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... Figure 45. Silkscreen Top Rev Page AD8151 ...
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... AD8151 Figure 46. Solder Mask Top Rev Page ...
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... Figure 47. Silkscreen Bottom Rev Page AD8151 ...
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... AD8151 Figure 48. Solder Mask Bottom Rev Page ...
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... Figure 49. INT1 ( Rev Page AD8151 ...
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... AD8151 Figure 50. INT2 ( Rev Page ...
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... V 110 IN03N 109 IN03P 108 V IN02N 107 106 IN02P 105 V 104 IN01N 103 IN01P 102 V 101 IN00N 100 IN00P OUT00P 95 OUT00N AD8151 C60 0.01μ ...
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... AD8151 R19 R40 R58 1.65kΩ 1.65kΩ 1.65kΩ IN06P IN00P P4 P28 P16 R20 R39 R57 105Ω 105Ω 105Ω P5 P17 P29 IN00N R38 IN06N R56 R21 1.65kΩ 1.65kΩ 1.65kΩ ...
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... 10μ C86 C87 EE 0.1μF 0.1μ 10μ P104 P105 AD8151 74HC14 74HC14 74HC14 74HC132 74HC132 TP20 TP14 TP15 TP16 TP17 TP18 TP19 . ...
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... AD8151 OUTLINE DIMENSIONS 1.45 1.40 1.35 0.15 SEATING 0.05 PLANE VIEW A ROTATED 90° CCW ORDERING GUIDE Model Temperature Range AD8151AST 0°C to 85°C AD8151ASTZ 1 0°C to 85°C AD8151-EVAL Pb-free part. 22.20 0.75 22.00 SQ 1.60 0.60 21.80 MAX 0.45 184 1 PIN 1 TOP VIEW (PINS DOWN) 0.20 0.09 7° 3.5° 0° 0.08 MAX 0.40 VIEW A COPLANARITY ...
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... NOTES Rev Page AD8151 ...
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... AD8151 NOTES © 2005 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. C02169-0-12/05(B) Rev Page ...