LM1236 National Semiconductor Corporation, LM1236 Datasheet - Page 31

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LM1236

Manufacturer Part Number
LM1236
Description
150 Mhz I2c Compatible Rgb Preamplifier With Internal 254 Character Osd Rom, 512 Character Ram And 4 Dacs
Manufacturer
National Semiconductor Corporation
Datasheet

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Building Display Pages
When bits 6–5 are 0, the 4-bit attribute code will be automatically applied to all the character codes transmitted after this attribute
byte, as in the LM1237 and LM1247. This mode is useful for sending character codes that use the same attribute. No further
attribute codes can follow without stopping and restarting a new transmission. The Page RAM address is automatically
incremented starting with the initial LSB and MSB address in the beginning of the sequence.
TWO BYTE COMMUNICATION MODE
The Two Byte Communication mode allows different attribute and character codes to be sent within one transmission without
stopping. The attribute byte is shown in Table 18, and the sequence of transmitted bytes is shown in Table 19. Either another
attribute & character code pair or a STOP must follow after each character code. The Page RAM address is automatically
incremented just as in the Auto Attribute mode above.
HALF RANDOM ADDRESS MODE
The Half Random Address mode allows different attribute and character codes to be sent within one transmission in the same
way as the Two Byte Communication mode. The advantage of Half Random Addressing over the Two Byte mode is that the Page
RAM addresses do not have to be written to in a sequential order. However, the Page RAM addresses cannot be entirely random,
as they must be within one half of the Page RAM. A new transmission must be restarted to switch to another half of the Page
RAM. The Page RAM address is not automatically incremented in this mode. This mode is very useful for modifying character
codes and attributes in the first 256 locations of the Page RAM. The attribute byte is shown in Table 20, and the sequence of
transmitted bytes is shown in Table 21. Either another LSB address & attribute & character code or a STOP must follow after each
character code.
FULL RANDOM ADDRESS MODE
The Full Random Address mode is very similar to the Half Random Address mode. However, the advantage is that the Page RAM
addresses can now be entirely random. There is no longer a restriction to only one half of the Page RAM. The Page RAM address
is not automatically incremented in this mode. This is very useful for modifying character codes and attributes anywhere in the
Page RAM without starting a new transmission sequence. The Full Random Address mode is the most flexible mode of
transmission. The attribute byte is shown in Table 22, and the sequence of transmitted bytes is shown in Table 23. Either another
LSB address & MSB address & attribute & character code or a STOP must follow after each character code.
X
X
X
X
0
TABLE 18. Two Byte Communication Mode
0
1
1
TABLE 19. Sequence of Transmitted Bytes
TABLE 21. Sequence of Transmitted Bytes
(Continued)
TABLE 20. Half Random Address Mode
TABLE 22. Full Random Address Mode
TABLE 17. Auto Attribute Mode
0
1
0
1
ATTRIBUTE Byte
ATTRIBUTE Byte
ATTRIBUTE Byte
ATTRIBUTE Byte
X
X
X
X
31
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ATT[3:0]
ATT[3:0]
ATT[3:0]
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