LM1236 National Semiconductor Corporation, LM1236 Datasheet - Page 39

• Manufacturer Part Number: LM1236
• Description: 150 Mhz I2c Compatible Rgb Preamplifier With Internal 254 Character Osd Rom, 512 Character Ram And 4 Dacs
• Manufacturer: National Semiconductor Corporation

Bit 0
Bits 5–1
Bit 6
Bit 7
Bits 8–0
Bits 17–9
Bits 21–18
Bits 31–22
C2B0
Blue
Pre-Amplifier Interface Registers
Software Reset and Test Control:
Attribute Table and Enhanced Features
Each display character and SL in the Display Page RAM will have a 4-bit Attribute Table entry associated with it. The user should
note that two-color display characters and four-color display characters use two different Attribute Tables, effectively providing 16
attributes for two-color display characters and 16 attributes for four-color display characters.
For two-color characters, the attribute contains the code for the 9-bit foreground color (Color 1), the code for the 9-bit background
color (Color 0), and the character’s enhanced features (Button Box, Blinking, Heavy Box, Shadowing, Bordering, etc.).
For four-color characters, the attribute contains the code for the 9-bit Color 0, the code for the 9-bit Color 1, the code for the 9-bit
Color 2, the code for the 9-bit Color 3, and the character’s enhanced features (Button Box, Blinking, Heavy Box, Shadowing,
Bordering, etc.).
TWO COLOR ATTRIBUTE FORMAT
The address range for an attribute number, 0 ≤ n ≤ 15, is provided in Table 26.
X
X
Color 1 - Green
These nine bits determine the background color (color1), which is displayed when the corresponding OSD pixel is a
0.
These nine bits determine the foreground color (color2), which is displayed when the corresponding OSD pixel is a
1.
These are the enhanced feature (EF) bits, which determine which feature is applied to the displayed character. The
features and their corresponding codes are shown in Table 25.
Reserved and should be set to zero.
C1G[2:0]
When this bit is a 1, all registers except this one are loaded with their default values. All operations are aborted,
except data transfers in progress on the I
Reserved and should be set to zero.
This bit disables the register Auto-Increment feature of the I
Auto-Increment is disabled and when a 0, AI is enabled.
Reserved and should be set to zero.
X
ATT2C3n (0x8443+n
ATT2C1n (0x8441+n
Res’d
X
Bits 21–18
X
0000b
0001b
0010b
0100b
0101b
1000b
1001b
1010b
0011b
0110b
0111b
1011b
AID
Reserved
X
Color 1 - Red
C1R[2:0]
*
*
TABLE 25. Enhanced Feature Descriptions
Normal Display
Blinking
Shadowing
Bordering
RESERVED
RESERVED
RESERVED
RESERVED
Raised Box
Blinking and Raised Box
Depressed Box
Blinking and Depressed Box
4)
4)
X
X
SRTSTCTRL (0x843F)
X
X
2
(Continued)
C compatible bus. This bit clears itself when the reset is complete.
X
Color 0 - Blue
Feature Description
39
Reserved
C0B[2:0]
X
X
2
C compatible protocol. When set to a 1,
X
X
ATT2C0n (0x8440+n
Color 0 - Green
ATT2C2n (0x8442+n
Enhanced Feature
C0G[2:0]
X
EFB[3:0]
Reset
SRST
*
*
4)
4)
Color 0 - Red
C0R[2:0]
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Color 1 -
C1B[2:1]