LM1236 National Semiconductor Corporation, LM1236 Datasheet - Page 37

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LM1236

Manufacturer Part Number
LM1236
Description
150 Mhz I2c Compatible Rgb Preamplifier With Internal 254 Character Osd Rom, 512 Character Ram And 4 Dacs
Manufacturer
National Semiconductor Corporation
Datasheet

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Pre-Amplifier Interface Registers
Contrast Control:
DAC 1 Output Level:
DAC 2 Output Level:
DAC 3 Output Level:
DAC 4 Output Level:
DAC Config, OSD Contrast & DC Offset:
Bits 6–0
Bit 7
Bits 6–0
Bit 7
Bits 7–0
Bits 7–0
Bits 7–0
Bits 7–0
Bits 2–0
Bits 4–3
This register determines the gain of the red video channel. This affects only the red channel
whereas the contrast register (0x8433) affects all channels.
Reserved and should be set to zero.
This register determines the contrast gain and affects all three channels, blue, red and green.
Reserved and should be set to zero.
This register determines the output of DAC 1. The full-scale output is determined by bit 5 of the
DAC Config, OSD Contrast & DC Offset Register.
This register determines the output of DAC 2. The full-scale output is determined by bit 5 of the
DAC Config, OSD Contrast & DC Offset Register.
This register determines the output of DAC 3. The full-scale output is determined by bit 5 of the
DAC Config, OSD Contrast & DC Offset Register (0x8438).
This register determines the output of DAC 4. The output of this DAC can be scaled and mixed
with the outputs of DACs 1–3 as determined by bit 6 of the DAC Config, OSD Contrast & DC
Offset Register.
These determine the DC offset of the three video outputs, blue, red and green.
These determine the contrast of the internally generated OSD.
Res’d
Res’d
X
X
DAC Options
DCF[1:0]
DACOSDDCOFF (0x8438)
CONTRCTRL (0x8433)
DAC1CTRL (0x8434)
DAC2CTRL (0x8435)
DAC3CTRL (0x8436)
DAC4CTRL (0x8437)
DAC 1 Output Level
DAC 2 Output Level
DAC 3 Output Level
DAC 4 Output Level
OSD Contrast
(Continued)
OSD[1:0]
GC[7:0]
BC[7:0]
RC[7:0]
BA[7:0]
37
Contrast
CG[6:0]
DC Offset
DC[2:0]
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