LM3S8930 Luminary Micro, Inc, LM3S8930 Datasheet - Page 6

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LM3S8930

Manufacturer Part Number
LM3S8930
Description
Lm3s8930 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet

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Table of Contents
14.2
14.2.1 I
14.2.2 Available Speed Modes ........................................................................................................... 342
14.2.3 Interrupts ................................................................................................................................ 343
14.2.4 Loopback Operation ................................................................................................................ 343
14.2.5 Command Sequence Flow Charts ............................................................................................ 344
14.3
14.4
14.5
14.6
15
15.1
15.2
15.3
15.4
15.4.1 Initialization ............................................................................................................................. 376
15.4.2 Operation ............................................................................................................................... 376
15.4.3 Transmitting Message Objects ................................................................................................. 377
15.4.4 Configuring a Transmit Message Object .................................................................................... 377
15.4.5 Updating a Transmit Message Object ....................................................................................... 378
15.4.6 Accepting Received Message Objects ...................................................................................... 378
15.4.7 Receiving a Data Frame .......................................................................................................... 378
15.4.8 Receiving a Remote Frame ...................................................................................................... 378
15.4.9 Receive/Transmit Priority ......................................................................................................... 379
15.4.10 Configuring a Receive Message Object .................................................................................... 379
15.4.11 Handling of Received Message Objects .................................................................................... 380
15.4.12 Handling of Interrupts .............................................................................................................. 380
15.4.13 Bit Timing Configuration Error Considerations ........................................................................... 381
15.4.14 Bit Time and Bit Rate ............................................................................................................... 381
15.4.15 Calculating the Bit Timing Parameters ...................................................................................... 383
15.5
15.6
16
16.1
16.2
16.2.1 Internal MII Operation .............................................................................................................. 417
16.2.2 PHY Configuration/Operation ................................................................................................... 417
16.2.3 MAC Configuration/Operation .................................................................................................. 418
16.2.4 Interrupts ................................................................................................................................ 420
16.3
16.4
16.5
16.6
17
18
18.1
18.2
6
Functional Description ............................................................................................................. 339
Initialization and Configuration ................................................................................................. 350
Register Map .......................................................................................................................... 351
Register Descriptions (I
Register Descriptions (I2C Slave) ............................................................................................. 365
Controller Area Network (CAN) Module ......................................................................... 374
Controller Area Network Overview ............................................................................................ 374
Controller Area Network Features ............................................................................................ 374
Controller Area Network Block Diagram .................................................................................... 375
Controller Area Network Functional Description ......................................................................... 375
Controller Area Network Register Map ...................................................................................... 385
Register Descriptions .............................................................................................................. 386
Ethernet Controller .......................................................................................................... 415
Block Diagram ........................................................................................................................ 416
Functional Description ............................................................................................................. 416
Initialization and Configuration ................................................................................................. 421
Ethernet Register Map ............................................................................................................. 422
Ethernet MAC Register Descriptions ......................................................................................... 423
MII Management Register Descriptions ..................................................................................... 440
Pin Diagram ...................................................................................................................... 459
Signal Tables .................................................................................................................... 461
100-Pin LQFP Package Pin Tables ........................................................................................... 461
108-Pin BGA Package Pin Tables ............................................................................................ 472
2
C Bus Functional Overview .................................................................................................... 340
2
C Master) ........................................................................................... 352
Preliminary
July 25, 2008

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