LM3S5652 Luminary Micro, Inc, LM3S5652 Datasheet - Page 6

• Manufacturer Part Number: LM3S5652
• Description: Lm3s5652 Arm Microcontroller
• Manufacturer: Luminary Micro, Inc

Table of Contents
13.2.1 Sample Sequencers ................................................................................................................ 344
13.2.2 Module Control ........................................................................................................................ 345
13.2.3 Hardware Sample Averaging Circuit ......................................................................................... 346
13.2.4 Analog-to-Digital Converter ...................................................................................................... 346
13.2.5 Differential Sampling ............................................................................................................... 346
13.2.6 Internal Temperature Sensor .................................................................................................... 348
13.3
13.3.1 Module Initialization ................................................................................................................. 349
13.3.2 Sample Sequencer Configuration ............................................................................................. 349
13.4
13.5
14
14.1
14.2
14.2.1 Transmit/Receive Logic ........................................................................................................... 376
14.2.2 Baud-Rate Generation ............................................................................................................. 377
14.2.3 Data Transmission .................................................................................................................. 377
14.2.4 Serial IR (SIR) ......................................................................................................................... 378
14.2.5 FIFO Operation ....................................................................................................................... 379
14.2.6 Interrupts ................................................................................................................................ 379
14.2.7 Loopback Operation ................................................................................................................ 380
14.2.8 DMA Operation ....................................................................................................................... 380
14.2.9 IrDA SIR block ........................................................................................................................ 381
14.3
14.4
14.5
15
15.1
15.2
15.2.1 Bit Rate Generation ................................................................................................................. 419
15.2.2 FIFO Operation ....................................................................................................................... 419
15.2.3 Interrupts ................................................................................................................................ 419
15.2.4 Frame Formats ....................................................................................................................... 420
15.2.5 DMA Operation ....................................................................................................................... 427
15.3
15.4
15.5
16
16.1
16.2
16.2.1 I
16.2.2 Available Speed Modes ........................................................................................................... 460
16.2.3 Interrupts ................................................................................................................................ 461
16.2.4 Loopback Operation ................................................................................................................ 462
16.2.5 Command Sequence Flow Charts ............................................................................................ 462
16.3
16.4
6
Initialization and Configuration ................................................................................................. 348
Register Map .......................................................................................................................... 349
Register Descriptions .............................................................................................................. 350
Universal Asynchronous Receivers/Transmitters (UARTs) ......................................... 375
Block Diagram ........................................................................................................................ 376
Functional Description ............................................................................................................. 376
Initialization and Configuration ................................................................................................. 381
Register Map .......................................................................................................................... 382
Register Descriptions .............................................................................................................. 383
Synchronous Serial Interface (SSI) ................................................................................ 418
Block Diagram ........................................................................................................................ 418
Functional Description ............................................................................................................. 419
Initialization and Configuration ................................................................................................. 428
Register Map .......................................................................................................................... 429
Register Descriptions .............................................................................................................. 430
Inter-Integrated Circuit (I
Block Diagram ........................................................................................................................ 457
Functional Description ............................................................................................................. 457
Initialization and Configuration ................................................................................................. 468
I
2
2
C Bus Functional Overview .................................................................................................... 458
C Register Map ..................................................................................................................... 469
2
C) Interface ............................................................................ 457
Preliminary
June 02, 2008