LM3S300 Luminary Micro, Inc, LM3S300 Datasheet - Page 20

• Manufacturer Part Number: LM3S300
• Description: Lm3s300 Arm Microcontroller
• Manufacturer: Luminary Micro, Inc

Architectural Overview
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Synchronous Serial Interface (SSI)
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UART
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Analog Comparators
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C
Programmable interrupt generation logic with interrupt masking
Lock register protection from runaway software
Reset generation logic with an enable/disable
User-enabled stalling when the controller asserts the CPU Halt flag during debug
Master or slave operation
Programmable clock bit rate and prescale
Separate transmit and receive FIFOs, 16 bits wide, 8 locations deep
Programmable interface operation for Freescale SPI, MICROWIRE, or Texas Instruments
synchronous serial interfaces
Programmable data frame size from 4 to 16 bits
Internal loopback test mode for diagnostic/debug testing
Two fully programmable 16C550-type UARTs
Separate 16x8 transmit (TX) and 16x12 receive (RX) FIFOs to reduce CPU interrupt service
loading
Programmable baud-rate generator allowing speeds up to 1.5625 Mbps
Programmable FIFO length, including 1-byte deep operation providing conventional
double-buffered interface
FIFO trigger levels of 1/8, 1/4, 1/2, 3/4, and 7/8
Standard asynchronous communication bits for start, stop, and parity
False-start-bit detection
Line-break generation and detection
Three independent integrated analog comparators
Configurable for output to: drive an output pin or generate an interrupt
Compare external pin input to external pin input or to internal programmable voltage reference
Master and slave receive and transmit operation with transmission speed up to 100 Kbps in
Standard mode and 400 Kbps in Fast mode
Interrupt generation
Preliminary
June 04, 2008