LM3S3749 Luminary Micro, Inc, LM3S3749 Datasheet - Page 6

• Manufacturer Part Number: LM3S3749
• Description: Lm3s3749 Arm Microcontroller
• Manufacturer: Luminary Micro, Inc

Table of Contents
13.2.1 Sample Sequencers ................................................................................................................ 355
13.2.2 Module Control ........................................................................................................................ 356
13.2.3 Hardware Sample Averaging Circuit ......................................................................................... 357
13.2.4 Analog-to-Digital Converter ...................................................................................................... 357
13.2.5 Differential Sampling ............................................................................................................... 357
13.2.6 Internal Temperature Sensor .................................................................................................... 359
13.3
13.3.1 Module Initialization ................................................................................................................. 360
13.3.2 Sample Sequencer Configuration ............................................................................................. 360
13.4
13.5
14
14.1
14.2
14.2.1 Transmit/Receive Logic ........................................................................................................... 387
14.2.2 Baud-Rate Generation ............................................................................................................. 388
14.2.3 Data Transmission .................................................................................................................. 388
14.2.4 Serial IR (SIR) ......................................................................................................................... 389
14.2.5 FIFO Operation ....................................................................................................................... 390
14.2.6 Interrupts ................................................................................................................................ 390
14.2.7 Loopback Operation ................................................................................................................ 391
14.2.8 DMA Operation ....................................................................................................................... 391
14.2.9 IrDA SIR block ........................................................................................................................ 392
14.3
14.4
14.5
15
15.1
15.2
15.2.1 Bit Rate Generation ................................................................................................................. 430
15.2.2 FIFO Operation ....................................................................................................................... 430
15.2.3 Interrupts ................................................................................................................................ 430
15.2.4 Frame Formats ....................................................................................................................... 431
15.2.5 DMA Operation ....................................................................................................................... 438
15.3
15.4
15.5
16
16.1
16.2
16.2.1 I
16.2.2 Available Speed Modes ........................................................................................................... 471
16.2.3 Interrupts ................................................................................................................................ 472
16.2.4 Loopback Operation ................................................................................................................ 473
16.2.5 Command Sequence Flow Charts ............................................................................................ 473
16.3
16.4
6
Initialization and Configuration ................................................................................................. 359
Register Map .......................................................................................................................... 360
Register Descriptions .............................................................................................................. 361
Universal Asynchronous Receivers/Transmitters (UARTs) ......................................... 386
Block Diagram ........................................................................................................................ 387
Functional Description ............................................................................................................. 387
Initialization and Configuration ................................................................................................. 392
Register Map .......................................................................................................................... 393
Register Descriptions .............................................................................................................. 394
Synchronous Serial Interface (SSI) ................................................................................ 429
Block Diagram ........................................................................................................................ 429
Functional Description ............................................................................................................. 430
Initialization and Configuration ................................................................................................. 439
Register Map .......................................................................................................................... 440
Register Descriptions .............................................................................................................. 441
Inter-Integrated Circuit (I
Block Diagram ........................................................................................................................ 468
Functional Description ............................................................................................................. 468
Initialization and Configuration ................................................................................................. 479
I
2
2
C Bus Functional Overview .................................................................................................... 469
C Register Map ..................................................................................................................... 480
2
C) Interface ............................................................................ 468
Preliminary
June 02, 2008