LM3S3749 Luminary Micro, Inc, LM3S3749 Datasheet - Page 706

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LM3S3749

Manufacturer Part Number
LM3S3749
Description
Lm3s3749 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet

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Boot Loader
A.2.3
A.3
A.3.1
A.3.2
706
the board running the boot loader (which is at least 8.4 MHz, providing support for up to 700 KHz)..
Since the host device is the master, the SSI on the boot loader device does not need to determine
the clock as it is provided directly by the host.
I
The Inter-Integrated Circuit (I
port will work at both 100 Khz and 400 KHz I
the I
the host.
Packet Handling
All communications, with the exception of the UART auto-baud, are done via defined packets that
are acknowledged (ACK) or not acknowledged (NAK) by the devices. The packets use the same
format for receiving and sending packets, including the method used to acknowledge successful or
unsuccessful reception of a packet.
Packet Format
All packets sent and received from the device use the following byte-packed format.
struct
{
};
ucSize
ucChecksum
Data
Sending Packets
The actual bytes of the packet can be sent individually or all at once; the only limitation is that
commands that cause flash memory access should limit the download sizes to prevent losing bytes
during flash programming. This limitation is discussed further in the section that describes the boot
loader command, COMMAND_SEND_DATA (see “COMMAND_SEND_DATA (0x24)” on page 708).
Once the packet has been formatted correctly by the host, it should be sent out over the UART or
SSI interface. Then the host should poll the UART or SSI interface for the first non-zero data
returned from the device. The first non-zero byte will either be an ACK (0xCC) or a NAK (0x33) byte
from the device indicating the packet was received successfully (ACK) or unsuccessfully (NAK).
This does not indicate that the actual contents of the command issued in the data portion of the
packet were valid, just that the packet was received correctly.
2
unsigned char ucSize;
unsigned char ucCheckSum;
unsigned char Data[];
C
2
C on the boot loader device does not need to determine the clock as it is provided directly by
2
C) port operates in slave mode with a slave address of 0x42. The I
The first byte received holds the total size of the transfer including
the size and checksum bytes.
This holds a simple checksum of the bytes in the data buffer only.
The algorithm is Data[0]+Data[1]+…+ Data[ucSize-3].
This is the raw data intended for the device, which is formatted in
some form of command interface. There should be ucSize–2
bytes of data provided in this buffer to or from the device.
Preliminary
2
C clock frequency. Since the host device is the master,
June 02, 2008
2
C

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