MT18VDDT3272 Micron, MT18VDDT3272 Datasheet - Page 22

• Manufacturer Part Number: MT18VDDT3272
• Description: 184-Pin Registered DDR SDRAM DIMMs (x72)
• Manufacturer: Micron

SERIAL PRESENCE-DETECT EEPROM DC OPERATING CONDITIONS
(Note: 1) (V
SERIAL PRESENCE-DETECT EEPROM AC OPERATING CONDITIONS
(Notes: 1) (V
NOTE: 1. All voltages referenced to V
32, 64 Meg x 72 DDR SDRAM DIMMs
DD18C32_64X72AG_B.p65–Rev. B, Pub. 1/02
PARAMETER/CONDITION
SUPPLY VOLTAGE
INPUT HIGH VOLTAGE: Logic 1; All inputs
INPUT LOW VOLTAGE: Logic 0; All inputs
OUTPUT LOW VOLTAGE: I
INPUT LEAKAGE CURRENT: V
OUTPUT LEAKAGE CURRENT: V
STANDBY CURRENT:
SCL = SDA = V
POWER SUPPLY CURRENT:
SCL clock frequency = 100 KHz
PARAMETER/CONDITION
SCL LOW to SDA data-out valid
Time the bus must be free before a new transition can start
Data-out hold time
SDA and SCL fall time
Data-in hold time
Start condition hold time
Clock HIGH period
Noise suppression time constant at SCL, SDA inputs
Clock LOW period
SDA and SCL rise time
SCL clock frequency
Data-in setup time
Start condition setup time
Stop condition setup time
WRITE cycle time
2. The refresh period is 64ms. This equates to an average refresh rate of 15.625µs. However, an AUTO REFRESH
command must be asserted at least once every 31.2µs; burst refreshing or postings greater than 2 are not allowed.
DD
DD
= +3.3V ±0.3V)
= +3.3V ±0.3V)
DD
- 0.3V; All other inputs = GND or 3.3V +10%
OUT
IN
= 3mA
= GND to V
OUT
SS
.
= GND to V
DD
DD
22
Micron Technology, Inc., reserves the right to change products or specifications without notice.
184-pin DDR SDRAM DIMMs
256MB, 512MB (ECC x72)
SYMBOL
t
t
t
t
t
HD:DAT
HD:STA
SU:DAT
SU:STA
SU:STO
t
t
t
t
HIGH
LOW
t
WRC
t
t
SYMBOL
BUF
SCL
AA
DH
t
t
t
R
F
I
V
V
V
V
I
I
I
I
LO
SB
CC
DD
LI
OL
IH
IL
MIN
300
250
0.3
4.7
4.7
4.7
4.7
0
4
4
V
DD
MIN
-1
3
–
–
–
–
–
x 0.7 V
MAX
300
100
100
3.5
10
1
V
DD
DD
MAX
©2002, Micron Technology, Inc.
UNITS
3.6
0.4
10
10
30
2
KHz
+ 0.5
x 0.3
ms
µs
µs
ns
ns
µs
µs
µs
ns
µs
µs
ns
µs
µs
UNITS
NOTES
mA
µA
µA
µA
V
V
V
V
2