MT28F128J3FS-15F Micron, MT28F128J3FS-15F Datasheet - Page 28

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MT28F128J3FS-15F

Manufacturer Part Number
MT28F128J3FS-15F
Description
128Mb Q-FLASH MEMORY
Manufacturer
Micron
Datasheet
NOTE: 1. Byte or word count values on DQ0–DQ7 are loaded into the count register. Count ranges on this device for byte mode
128Mb, 64Mb, 32Mb Q-Flash Memory
MT28F640J3_6.p65 – Rev. 5, Pub. 6/02
Yes
2. The device now outputs the status register when read (XSR is no longer available).
3. Write buffer contents will be programmed at the device start address or destination Flash address.
4. Align the start address on a write buffer boundary for maximum programming performance (i.e., A4–A0 of the start
5. The device aborts the WRITE-to-BUFFER command if the current address is outside of the original block address.
6. The status register indicates an “improper command sequence” if the WRITE-to-BUFFER command is aborted. Follow
7. Toggling OE# (LOW to HIGH to LOW) updates the status register. This can be done in place of issuing the READ STATUS
Yes
WRITE-to-BUFFER Flowchart
are n = 00h to 1Fh and for word mode are n = 0000h to 000Fh.
address = 0).
this with a CLEAR STATUS REGISTER command.
REGISTER command.
Count, Block Address
Data, Device Address
Read Status Register
Write Word or Byte
Program Buffer to
Write Buffer Data,
Write Next Buffer
Flash Confirm D0h
WRITE-to-BUFFER
WRITE-to-BUFFER
WRITE-to-BUFFER
Check if Desired
Yes
Command E8h,
Read Extended
Status Register
Block Address
Programming
Start Address
Set Timeout
Command?
Full Status
Complete
X = X + 1
Another
XSR7 =
X = N?
Check
Abort
SR7 =
X = 0
Start
Issue
?
No
No
No
1
1
1
Figure 4
Yes
0
0
No
Write to Another
Write to Buffer
Block Address
BUFFER Timeout?
Aborted
WRITE-to-
READ STATUS
Command
Issue
Yes
28
BUS
OPERATION COMMAND
WRITE
READ
STANDBY
WRITE
WRITE
WRITE
WRITE
READ
STANDBY
Full status check can be done after all erase and write
sequences complete. Write FFh after the last operation
to reset the device to read array mode.
7
1, 2
3, 4
5, 6
Micron Technology, Inc., reserves the right to change products or specifications without notice.
BUFFER
Buffer to
Flash Confirm
WRITE-to-
Program
128Mb, 64Mb, 32Mb
Q-FLASH MEMORY
COMMENTS
Data = E8h
Block Address
XSR7 = Valid
Addr = Block Address
Check XSR7
1 = Write Buffer Available
0 = Write Buffer Not Available
Data = N = Word/Byte Count
N = 0 Corresponds to Count = 1
Addr = Block Address
Data = Write Buffer Data
Addr = Device Start Address
Data = Write Buffer Data
Addr = Device Address
Addr = Block Address
Status register data with the
device enabled, OE# LOW
updates SR
Addr = Block Address
Check SR7
1 = ISM Ready
0 = ISM Busy
Data = D0h
PRELIMINARY
©2002, Micron Technology, Inc.

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