IDT72T36125L5BB IDT, Integrated Device Technology Inc, IDT72T36125L5BB Datasheet - Page 46

• Manufacturer Part Number: IDT72T36125L5BB
• Description: IC FIFO 524X18 5NS 240BGA
• Manufacturer: IDT, Integrated Device Technology Inc
• Series: 72Tr

Specifications of IDT72T36125L5BB

• Function: Asynchronous, Synchronous
• Memory Size: 9.4K (524 x 18)
• Data Rate: 83MHz
• Access Time: 5ns
• Voltage - Supply: 2.375 V ~ 2.625 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 240-BGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 72T36125L5BB

NOTE:
1. X = 10 for the IDT72T3645, X = 11 for the IDT72T3655, X = 12 for the IDT72T3665, X = 13 for the IDT72T3675, X = 14 for the IDT72T3685, X = 15 for the IDT72T3695, X = 16
NOTE:
1. This timing diagram illustrates programming with an input bus width of 36 bits.
NOTES:
1. OE = LOW.
2. The timing diagram illustrates reading of offset registers with an output bus width of 36 bits.
3. The offset registers cannot be read on consecutive RCLK cycles. The read must be disabled (REN = HIGH) for a minimum of one RCLK cycle in between register accesses.
SCLK
IDT72T3645/55/65/75/85/95/105/115/125 2.5V TeraSync™ ™ ™ ™ ™ 36-BIT FIFO
1K x 36, 2K x 36, 4K x 36, 8K x 36, 16K x 36, 32K x 36, 64K x 36, 128K x 36 and 256K x 36
D
Q
WCLK
RCLK
0
0
SEN
for the IDT72T36105, X = 17 for the IDT72T36115 and X = 18 for the IDT72T36125.
WEN
REN
- Q
LD
- D
LD
LD
SI
n
n
DATA IN OUTPUT REGISTER
t
SCKH
t
CLKH
t
Figure 21. Parallel Loading of Programmable Flag Registers (IDT Standard and FWFT Modes)
SCLK
Figure 20. Serial Loading of Programmable Flag Registers (IDT Standard and FWFT Modes)
Figure 22. Parallel Read of Programmable Flag Registers (IDT Standard and FWFT Modes)
t
CLK
t
t
SCKL
SENS
t
t
LDS
SDS
BIT 1
t
CLKL
t
LDS
t
ENS
t
t
LDS
t
SENH
A
t
t
CLKH
LDH
t
ENH
EMPTY OFFSET
t
CLK
t
t
t
ENS
LDS
t
CLKL
DS
PAE OFFSET VALUE
OFFSET
PAE
BIT X
(1)
46
t
ENH
t
t
LDH
DH
t
LDS
t
ENS
BIT 1
t
A
t
LDH
t
ENH
OFFSET
PAF
t
t
LDH
ENH
FULL OFFSET
t
DH
PAF OFFSET VALUE
COMMERCIAL AND INDUSTRIAL
TEMPERATURE RANGES
BIT X
t
LDS
t
ENS
t
t
(1)
FEBRUARY 4, 2009
ENH
t
SDH
LDH
t
A
t
LDH
t
ENH
PAE OFFSET
5907 drw27
5907 drw25
5907 drw26