74VHC273MTCX Fairchild Semiconductor, 74VHC273MTCX Datasheet - Page 6

IC FLIP FLOP OCT DTYPE 20TSSOP

74VHC273MTCX

Manufacturer Part Number
74VHC273MTCX
Description
IC FLIP FLOP OCT DTYPE 20TSSOP
Manufacturer
Fairchild Semiconductor
Series
74VHCr
Type
D-Type Busr
Datasheet

Specifications of 74VHC273MTCX

Function
Master Reset
Output Type
Non-Inverted
Number Of Elements
1
Number Of Bits Per Element
8
Frequency - Clock
165MHz
Delay Time - Propagation
5.8ns
Trigger Type
Positive Edge
Current - Output High, Low
8mA, 8mA
Voltage - Supply
2 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
20-TSSOP
Logic Family
VHC
Technology
CMOS
Number Of Bits
8
Number Of Elements
1
Clock-edge Trigger Type
Positive-Edge
Polarity
Non-Inverting
Operating Supply Voltage (typ)
2.5/3.3/5V
Package Type
TSSOP
Propagation Delay Time
19.5ns
Low Level Output Current
8mA
High Level Output Current
-8mA
Frequency (max)
70MHz
Operating Supply Voltage (min)
2V
Operating Supply Voltage (max)
5.5V
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
20
Number Of Circuits
8
Logic Type
D-Type Flip-Flop
Input Type
Single-Ended
Supply Voltage (max)
5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Supply Voltage (min)
2 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
74VHC273MTCXTR

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©1994 Fairchild Semiconductor Corporation
74VHC273 Rev. 1.5
AC Electrical Characteristics
Notes:
3. Parameter guaranteed by design t
4. C
AC Operating Requirements
Note:
5. V
t
Symbol
t
PLH
current consumption without load. Average operating current can be obtained from the equation:
I
calculated by the equation: C
W
t
CC
Symbol
t
OSLH
f
OSHL
CC
t
C
PD
(L), t
C
MAX
PHL
t
t
, t
PD
W
IN
REC
(opr.) = C
t
t
is defined as the value of the internal equivalent capacitance which is calculated from the operating
is 3.3 ± 0.3V or 5.0 ± 0.5V
H
PHL
(L)
S
,
W
(H)
Maximum Clock
Frequency
Propagation Delay
Time (CK – Q)
Propagation Delay
Time (MR – Q)
Output to Output
Skew
Input Capacitance
Power Dissipation
Capacitance
PD
Minimum Pulse Width (CK)
Minimum Pulse Width (MR)
Minimum Setup Time
Minimum Hold Time
Minimum Removal Time (MR)
Parameter
• V
CC
• f
Parameter
IN
+ I
PD
CC
3.3 ± 0.3
5.0 ± 0.5
3.3 ± 0.3
5.0 ± 0.5
3.3 ± 0.3
5.0 ± 0.5
3.3 ± 0.3
5.0 ± 0.5
V
(total) = 22 + 9n.
/ 8 (per F/F). The total C
CC
OSLH
(V)
= |t
PLH
(3)
V
(4)
CC
max – t
Conditions
V
= Open
CC
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
C
C
C
C
C
C
C
C
C
C
C
C
C
C
(V)
L
L
L
L
L
L
L
L
L
L
L
L
L
L
PLH
= 15pF
= 50pF
= 15pF
= 50pF
= 15pF
= 50pF
= 15pF
= 50pF
= 15pF
= 50pF
= 15pF
= 50pF
= 50pF
= 50pF
6
(5)
PD
min|; t
when n pieces of the Flip-Flop operates can be
Typ.
OSHL
T
A
Min.
= 25°C
120
75
50
80
= |t
PHL
T
5.5
5.0
5.0
5.0
5.5
4.5
1.0
1.0
2.5
2.0
A
max – t
Guaranteed Minimum
Typ.
11.2
11.4
= 25°C
120
165
110
8.7
5.8
7.3
8.9
5.2
6.7
4.0
75
31
T
PHL
A
Max.
13.6
17.1
11.0
13.6
17.1
10.5
10.0
9.0
8.5
1.5
1.0
= –40°C to +85°C
min|.
6.5
5.0
6.0
5.0
6.5
4.5
1.0
1.0
2.5
2.0
Min.
T
100
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
65
45
70
to +85°C
A
= –40°C
Max.
16.0
19.5
10.5
12.5
16.0
19.5
10.0
12.0
10.0
1.5
1.0
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Units
Units
MHz
MHz
ns
ns
ns
ns
ns
pF
pF
ns
ns
ns
ns
ns

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