NL10276AC24_02 NEC, NL10276AC24_02 Datasheet

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NL10276AC24_02

Manufacturer Part Number
NL10276AC24_02
Description
TFT COLOR LCD MODULE
Manufacturer
NEC
Datasheet
Document No. EN0155EJ1V0DS00
Date Published March 1996 M
Printed in Japan
Vertical screen expansion (Multi-scan), Incorporated backlight with inverter
DESCRIPTION
amorphous silicon TFT attached to each signal electrode, a driving circuit and a backlight. NL10276AC24-02 has
a built-in backlight/inverter.
taneously because of analog interface.
FEATURES
APPLICATIONS
™ Analog RGB interface
™ Vertical screen expansion (Multi-scan)
™ High luminous / Low reflection
™ Incorporated edge-light type backlight with inverter.
™ Engineering workstation (EWS), Personal computer (PC), Word processor
™ Display terminals for control system
™ New media
™ Monitors for process controller
NL10276AC24-02 is a TFT (thin film transistor) active matrix color liquid crystal display (LCD) comprising
The 31cm diagonal display area contains 1024 768 pixels and can display more than 16 million colors simul-
31cm (12.1 type), 1024
DATA S H E ET
NL10276AC24-02
768 pixels, Full color
TFT COLOR LCD MODULE
©
1996

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NL10276AC24_02 Summary of contents

Page 1

Vertical screen expansion (Multi-scan), Incorporated backlight with inverter DESCRIPTION NL10276AC24- TFT (thin film transistor) active matrix color liquid crystal display (LCD) comprising amorphous silicon TFT attached to each signal electrode, a driving circuit and ...

Page 2

STRUCTURE AND FUNCTIONS A TFT color LCD module comprises a TFT LCD panel, LSIs for driving liquid crystal, and a backlight. The TFT LCD panel is composed of a TFT array glass substrate superimposed on a color filter glass substrate ...

Page 3

OUTLINE OF CHARACTERISTICS (at room temperature) Display area 245.76 (H) 184.32 (V)mm Drive system a-Si TFT active matrix Display colors Full-color Number of pixels 1024 768 Pixel arrangement RGB vertical stripe Pixel pitch 0.24 (H) 0.24 (V)mm Module size 290 ...

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GENERAL SPECIFICATIONS Item Module size 290.0 0.5(H) Display area 245.76(H) Number of pixels 1024(H) Dot pitch 0.08(H) Pixel pitch 0.24(H) Pixel arrangement RGB(Red, Green, Blue) vertical stripe Display colors Full-color Weight 1000 (max.) note : A variable resistor for the ...

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ELECTRICAL CHARACTERISTICS (1) Logic/LCD driving/Backlight Parameter Symbol V CC Supply voltage DDB Logic input "L" voltage V Logic input "H" voltage V Logic input "L" current 1 I IL1 Logic input "H" current 1 I IH1 Logic ...

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SUPPLY VOLTAGE SEQUENCE Voltage 0< 0< (Synchronous signals, Control signals) CAUTION Wrong power sequence may damage to the module. (1) Logic signals (synchronous signals and control signals) should be "0" voltage (V), when V higher than 0 input ...

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... CN1 : MRF03-6R-SMT (coaxial type) Adaptable socket : MRF03-2 6P-1.27 (For cable type) or MRF03-6PR-SMT (For board to board type) Supplier : HIROSE ELECTRIC CO., LTD. Coaxial cable : UL20537PF75VLAS Supplier : HITACHI CO., LTD. note : A coaxial cable shield should be connected with GND. Pin No. Symbol Pin No. 1 CLK 4 2 Hsync 5 ...

Page 8

... Pin No. Symbol Pin No. 1 GND 8 2 CNTSEL 9 3 CNTDAT 10 4 CNTSTB 11 5 GND 12 6 CNTCLK 13 7 CPSEL note : N.C. (No Connection) should be open. <Connector location: Rear view> 1 CN3 11 8 Symbol <Figure from socket view> CLAMP 13 12 GND N.C. GND N.C. GND 6 CN1 1 Connector 12 insert direction ...

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... POWC Positive Power control signal H or open : Logic, LCD power (*1) BRTH/BRTL – Pins for backlight brightness control Connect 10 k variable resistor (*2) or voltage control (*3). BRTC Positive Backlight ON/OFF control signal H or open : Backlight on L ACA Positive Luminance control signal ...

Page 10

... BRTH < connection of the variable resistor to pins > case of voltage control for brightness by BRTH/BRTL, at first, set BRTH to be "0 V". And BRTL input voltage can control the brightness. When BRTL input voltage is "1 V" the luminance become maximum. ...

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Serial communication timing and waveform D0 CNTDAT CNTSTB CNTCLK Parameter Symbol CLK pulse width twck CLK frequency fclk DATA setup-time tdst DATA hold-time tdhl Latch-pulse width twlp Latch setup-time tlst Rise / fall time tr, tf CNTDATA CNTCLK CNTSTB ...

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Table 1. CNTDAT COMPOSITION Data Data name D0 VEX3 Expansion mode D1 VEX2 Expansion mode D2 VEX1 Expansion mode D3 VEX0 Expansion mode D4 VD10 Vertical display position (MSB) D5 VD9 Vertical display position D6 VD8 Vertical display position D7 ...

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Table 2. Display mode (VEX3 to VEX0 ; 4 bit) VEX3 VEX2 VEX1 VEX0 Vertical magnification ...

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Table 4. Clock (CLK) delay (DELAY6 to DELAY0 ; 7 bit Delay value *1 00H 7.0 ns 2CH 01H 7.6 ns 2DH 02H 8.2 ns 2EH 03H 8.8 ns 2FH 04H ...

Page 15

MOD1 MOD0 Upper limit of VD6 to VD0 CLK-delay setting (HEXADECIMAL note 3 : This delay value is typical 25˚C, V power supply, the delay will be changed also. ...

Page 16

Table 6. Display horizontal position (HD8 to HD0; 9 bit) HD8 HD7 HD6 HD5 HD4 • • • • • • • • ...

Page 17

... This LCD module has the function of expanding vertical direction as shown in Table 1. And expanding horizontal direction is possible by setting input CLK frequency which is equivalent to the magnification necessary to make this CLK outside of this LCD module. DISPLAY IMAGE of after two pages is display example, when DE function is default and HD and VD are set to most suitable frequency ...

Page 18

SETTING SERIAL DATA FOR EXPANSION Input signal Mode CLK Hsync Vsync [MHz] [kHz] [Hz] XGA 65.000 48.363 60.004 75.000 56.476 70.069 79.000 58.088 72.980 78.750 60.023 75.029 SVGA 36.000 35.156 56.25 40.000 37.879 60.317 50.000 48.077 72.188 49.500 46.875 75.000 ...

Page 19

DISPLAY IMAGE (1) SVGA MODE (800 600) (2) VGA MODE (640 480) (3) PC-9801 MODE (640 400) (4) VGA-TEXT MODE (720 400) NL10276AC24-02 XGA (1024 768 pixels) Horizontal : 1.25 (1000 pixels) Vertical : 1.25 (750 pixels) Black display area ...

Page 20

INPUT SIGNAL TIMING (1) XGA-MODE (Standard) Name CLK Frequency Rise / fall Duty Hsync Period Display Front-porch Pulse-width Back-porch Pulse-width + Back-porch CLK-Hsync timing hold / setup time V-Hsync timing hold / setup time Rise / fall Vsync Period Display ...

Page 21

CLK 1 GND tds 1 Hsync Vsync Hsync 1 2.2 V (min.) ...

Page 22

Hsync Display period <Vertical> Vsync Display period 22 th thp thb thd tv tvp tvb tvd NL10276AC24-02 thf tvf ...

Page 23

Timing for generating CLAMP signal internally Hsync Display period CLAMP MOD1 MOD0 tA [CLK note : Exclude noises on analog RGB signal. Because during CLAMP = " L", ...

Page 24

INPUT SIGNAL AND DISPLAY POSITION (XGA STANDARD TIMING) (1) DELSEL="L" 767 ...

Page 25

DELSEL="H" CLK DATA INVALID DE Hsync DE DATA INVALID Vsync Hsync DATA INVALID DE NL10276AC24-02 tds thpd VALID tvp+tvb VALID INVALID tdh INVALID INVALID 25 ...

Page 26

... As the surface of polarizer is very soft and easily scratched, use a soft dry cloth without chemicals for cleaning not pull the interface connectors in or out while the LCD module is operating. t Put the module display side down on a flat horizontal plane. y Handle connectors and cables with care. ...

Page 27

Liquid Crystal Display has following specific characteristics. These are not defects or malfunction. The display condition of LCD module may be affected by the ambient temperature. The LCD module uses cold cathode tube for backlight. The optical characteristics, like luminance ...

Page 28

OUTLINE DRAWING : Front View (Unit in mm) (5) (4) (4) 28 255 0.5 215 0.3 188.8 0.3 (Bezel Opening) (184.32) (Active Area) 215 0.3 NL10276AC24-02 (5) (4) (4) ...

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OUTLINE DRAWING : Rear View (Unit in mm) (73.5) NL10276AC24-02 (55) (29) 210 29 ...

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NL10276AC24-02 ...

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NL10276AC24-02 31 ...

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... No part of this document may be copied in any form or by any means without the prior written consent of NEC Corporation. NEC Corporation does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from use of a device described herein or any other liability arising from use of such device ...

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