74LV74PW,118 NXP Semiconductors, 74LV74PW,118 Datasheet - Page 14

• Manufacturer Part Number: 74LV74PW,118
• Description: IC DUAL D FF POSEDG TRIG 14TSSOP
• Manufacturer: NXP Semiconductors
• Series: 74LVr
• Type: D-Typer

Specifications of 74LV74PW,118

• Output Type: Differential
• Package / Case: 14-TSSOP
• Function: Set(Preset) and Reset
• Number Of Elements: 2
• Number Of Bits Per Element: 1
• Frequency - Clock: 56MHz
• Trigger Type: Positive Edge
• Current - Output High, Low: 12mA, 12mA
• Voltage - Supply: 1 V ~ 5.5 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Number Of Circuits: 2
• Logic Family: LV
• Logic Type: D-Type Edge Triggered Flip-Flop
• Polarity: Inverting/Non-Inverting
• Input Type: Single-Ended
• Propagation Delay Time: 11 ns at 3.3 V
• High Level Output Current: - 12 mA
• Low Level Output Current: 12 mA
• Supply Voltage (max): 5.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Supply Voltage (min): 1 V
• Delay Time - Propagation: -
• Technology: CMOS
• Number Of Bits: 2
• Number Of Elements: 2
• Clock-edge Trigger Type: Positive-Edge
• Operating Supply Voltage (typ): 3.3V
• Package Type: TSSOP
• Frequency (max): 56MHz
• Operating Supply Voltage (min): 1V
• Operating Supply Voltage (max): 5.5V
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 14
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Delay Time - Propagation: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 74LV74PW-T; 74LV74PW-T; 935175140118

NXP Semiconductors
Fig 11. Package outline SOT337-1 (SSOP14)
74LV74_3
Product data sheet
SSOP14: plastic shrink small outline package; 14 leads; body width 5.3 mm
DIMENSIONS (mm are the original dimensions)
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
UNIT
mm
VERSION
OUTLINE
SOT337-1
max.
A
2
0.21
0.05
A
1
Z
14
1
1.80
1.65
A
y
2
IEC
e
pin 1 index
0.25
A
3
D
0.38
0.25
b
p
0.20
0.09
MO-150
b
JEDEC
p
c
8
7
Rev. 03 — 28 September 2007
REFERENCES
D
6.4
6.0
w
0
(1)
M
Dual D-type flip-flop with set and reset; positive edge-trigger
E
5.4
5.2
(1)
c
JEITA
scale
2.5
0.65
e
H
7.9
7.6
A
E
2
A
5 mm
1.25
1
L
1.03
0.63
L
E
H
p
E
detail X
0.9
0.7
Q
L
L
p
PROJECTION
Q
EUROPEAN
0.2
v
(A )
3
A
0.13
w
A
0.1
X
© NXP B.V. 2007. All rights reserved.
y
v
ISSUE DATE
M
74LV74
99-12-27
03-02-19
A
Z
1.4
0.9
(1)
SOT337-1
8
0
o
o
14 of 19