fm3808 Ramtron Corporation, fm3808 Datasheet - Page 2

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fm3808

Manufacturer Part Number
fm3808
Description
256kb Bytewide Fram W/ Real-time Clock
Manufacturer
Ramtron Corporation
Datasheet

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Pin Description
Rev. 1.3 (EOL)
Feb. 2006
Pin Name
A0-A14
DQ(7:0)
/CE
/OE
/WE
X1, X2
INT
V
V
V
BAK
DD
SS
32.768
kHz
Supply
Supply
Supply
Output
Input
Input
Input
Input
Input
I/O
I/O
VBAK
VDD
INT
X1
X2
Pin Description
Address: The 15 address inputs select one of 32,752 bytes in the FRAM array or one of
16 bytes in the clock/calendar. The address is latched on the falling edge of /CE.
Data: Bi-directional 8-bit data bus for accessing the FRAM array and clock.
Chip Enable: The active low /CE input selects the device. The falling edge of /CE
internally latches the address. Address changes that occur after /CE has transitioned
low are ignored until the next falling edge occurs.
Output Enable: The active low /OE input enables the data output buffers during read
cycles. Deasserting /OE high causes the DQ pins to tri-state.
Write Enable: The active low /WE low enables data on the DQ pins to be written to the
address location latched by the falling edge of /CE.
Connect 32.768 kHz crystal.
Interrupt output: This output can be programmed to respond to the clock/calendar
alarm, the watchdog timer, and the power monitor. It is programmable to either active
high (push/pull) or active low (open-drain).
Backup Supply Voltage: This supply is used to maintain power for the clock. It must
remain above 2.5V to keep battery-backed functions active. V
battery. Current I
Supply Voltage: 5V
Ground.
System Supervisor
Low VDD monitor/
Interrupt Control
Watchdog timer
Alarm
Logic
Clock/Calendar
Watchdog
timebase
Figure 1. Block Diagram
BAK
is drawn from V
Switched
power
BAK
when V
16 Clock/Calendar
Address Decoder/
Bus Interface
FRAM Array
Registers
32,752x8
DD
is below the V
Address
BAK
Data
BAK
WE
CE
OE
is supplied by a
voltage.
Page 2 of 27
FM3808

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