S25FL008K Meet Spansion Inc., S25FL008K Datasheet - Page 24
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S25FL008K
Manufacturer Part Number
S25FL008K
Description
8-mbit Cmos 3.0 Volt Flash Memory With 104-mhz Spi Serial Peripheral Interface Multi I/o Bus
Manufacturer
Meet Spansion Inc.
Datasheet
1.S25FL008K.pdf
(60 pages)
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24
6.2.8
Fast Read Dual Output (3Bh)
The Fast Read Dual Output (3Bh) instruction is similar to the standard Fast Read (0Bh) instruction except that
data is output on two pins; IO0 and IO1. This allows data to be transferred from the S25FL008K at twice the
rate of standard SPI devices. The Fast Read Dual Output instruction is ideal for quickly downloading code
from Flash to RAM upon power-up or for applications that cache code-segments to RAM for execution.
Similar to the Fast Read instruction, the Fast Read Dual Output instruction can operate at the highest
possible frequency of F
adding eight “dummy” clocks after the 24-bit address as shown in
device's internal circuits additional time for setting up the initial address. The input data during the dummy
clocks is “don’t care”. However, the IO0 pin should be high-impedance prior to the falling edge of the first data
out clock.
CLK
IO0
CLK
IO0
CS
IO1
CS
IO1
= MSB
Mode 3
Mode 0
32
0
33 34 35
Dummy Clocks
1
Figure 6.10 Fast Read Dual Output Instruction Sequence Diagram
Instruction (3Bh)
2
R
D a t a
(see
3
36 37
See AC Electrical Characteristics on page
4
S h e e t
5
38 39 40
6
S25FL008K
7
6
7
Data Out 1
23
5
4
8
41
( A d v a n c e
IO_0 Switches from Input to Output
22 21
2
3
9
42
24-Bit Address
10
1
0
43 44 45 46 47
7
6
3
Data Out 2
28 29
4
5
2
3
2
I n f o r m a t i o n )
1
30 31
Figure
1
0
0
6
7
48 49 50
Data Out 3
54.). This is accomplished by
6.10. The dummy clocks allow the
4
5
2
3
S25FL008K_00_01 July 30, 2010
0
1
51 52 53
6
7
Data Out 4
4
5
2
3
54 55
0
1
6
7