S25FL128K Meet Spansion Inc., S25FL128K Datasheet - Page 28

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S25FL128K

Manufacturer Part Number
S25FL128K
Description
128-mbit Cmos 3.0 Volt Flash Memory With 104-mhz Spi Serial Peripheral Interface Multi I/o Bus
Manufacturer
Meet Spansion Inc.
Datasheet
28
CLK
Fast Read Quad I/O with “8/16/32/64-Byte Wrap Around”
The Fast Read Quad I/O instruction can also be used to access a specific portion within a page by issuing a
“Set Burst with Wrap” command prior to EBh. The “Set Burst with Wrap” command can either enable or
disable the “Wrap Around” feature for the following EBh commands. When “Wrap Around” is enabled, the
data being accessed can be limited to either a 8, 16, 32 or 64-byte section of a 256-byte page. The output
data starts at the initial address specified in the instruction, once it reaches the ending boundary of the 8/16/
32/64-byte section, the output will wrap around to the beginning boundary automatically until CS# is pulled
high to terminate the command.
The Burst with Wrap feature allows applications that use cache to quickly fetch a critical address and then fill
the cache afterwards within a fixed length (8/16/32/64-byte) of data without issuing multiple read commands.
The “Set Burst with Wrap” instruction allows three “Wrap Bits”, W6-4 to be set. The W4 bit is used to enable
or disable the “Wrap Around” operation while W6-5 are used to specify the length of the wrap around section
within a page. See
CS#
IO1
IO3
IO0
IO2
CLK
CS#
IO3
IO1
IO2
IO0
Mode 3
Mode 0
Figure 6.14 Fast Read Quad I/O Instruction Sequence (Initial instruction or previous M5-4 10)
Mode 3
Mode 0
Figure 6.15 Fast Read Quad I/O Instruction Sequence (Previous instruction set M5-4 = 10)
0
A23-16
4
6
5
7
1
0
Section 6.2.14, Set Burst with Wrap (77h) on page
Instruction (EBh)
0
2
1
3
2
1
3
4
5
7
6
A15-8
2
4
0
1
3
D a t a
2
3
5
4
6
7
5
6
4
A7-0
S25FL128K
0
3
7
1
2
S h e e t
5
A23-16
7
4
5
6
8
4
7
5
6
6
M7-0
0
2
3
1
9
0
3
1
2
7
4
6
5
10
A15-8
7
( P r e l i m i n a r y )
3
0
1
2
Dummy
11 12 13
8
4
6
7
5
A7-0
9
0
2
3
1
10
Dummy
7
4
5
6
14 15 16
M7-0
11
0
2
3
1
32.
12
7
4
5
6
Dummy Dummy
Byte 1
0
1
17 18 19 20 21 22 23
13
3
2
S25FL128K_00_02 April 1, 2011
IO Switches from Input to Output
4
14
7
5
6
Byte 2
0
3
1
2
15
4
6
7
5
Byte 1
6
3
4
5
7
0
1
2
IO Switches from
Input to Output
4
6
5
Byte 2
7
0
2
3
1
4
5
6
7

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