S25FL129P Meet Spansion Inc., S25FL129P Datasheet - Page 24

no-image

S25FL129P

Manufacturer Part Number
S25FL129P
Description
128-mbit Cmos 3.0 Volt Flash Memory With 104-mhz Spi Serial Peripheral Interface Multi I/o Bus
Manufacturer
Meet Spansion Inc.
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
S25FL129P0XBHI300
Manufacturer:
SPANSION
Quantity:
20 000
Company:
Part Number:
S25FL129P0XBHI300
Quantity:
50
Part Number:
S25FL129P0XBHIZ00
Manufacturer:
SPANSION
Quantity:
20 000
Part Number:
S25FL129P0XMFI00
Manufacturer:
SPANSION
Quantity:
20 000
Part Number:
S25FL129P0XMFI000
Manufacturer:
SPANSION
Quantity:
20 000
Part Number:
S25FL129P0XMFI001
Manufacturer:
SPAMSION
Quantity:
20 000
Part Number:
S25FL129POXMFB013
Manufacturer:
SPANSION
Quantity:
8 000
Part Number:
S25FL129POXNFI011M
Manufacturer:
POLOMA
Quantity:
2 000
Part Number:
S25FL129POXNFI011M
Manufacturer:
SPANSION
Quantity:
3 010
9.
24
Command Definitions
The host system must shift all commands, addresses, and data in and out of the device, beginning with the
most significant bit. On the first rising edge of SCK after CS# is driven low, the device accepts the one-byte
command on SI (all commands are one byte long), most significant bit first. Each successive bit is latched on
the rising edge of SCK.
Every command sequence begins with a one-byte command code. The command may be followed by
address, data, both, or nothing, depending on the command. CS# must be driven high after the last bit of the
command sequence has been written.
The Read Data Bytes (READ), Read Data Bytes at Higher Speed (FAST_READ), Dual Output Read (DOR),
Quad Output Read (QOR), Dual I/O High Performance Read (DIOR), Quad I/O High Performance Read
(QIOR), Read Status Register (RDSR), Read Configuration Register (RCR), Read OTP Data (OTPR), Read
Manufacturer and Device ID (READ_ID), Read Identification (RDID) and Release from Deep Power-Down
and Read Electronic Signature (RES) command sequences are followed by a data output sequence on SO.
CS# can be driven high after any bit of the sequence is output to terminate the operation.
The Page Program (PP), Quad Page Program (QPP), 64 KB Sector Erase (SE), 4 KB Parameter Sector
Erase (P4E), 8 KB Parameter Sector Erase (P8E), Bulk Erase (BE), Write Status and Configuration Registers
(WRR), Program OTP space (OTPP), Write Enable (WREN), or Write Disable (WRDI) commands require that
CS# be driven high at a byte boundary, otherwise the command is not executed. Since a byte is composed of
eight bits, CS# must therefore be driven high when the number of clock pulses after CS# is driven low is an
exact multiple of eight.
The device ignores any attempt to access the memory array during a Write Registers, program, or erase
operation, and continues the operation uninterrupted.
The instruction set is listed in
Table 9.1
Table
D a t a
lists the complete set of commands.
9.1.
S25FL129P
S h e e t
( P r e l i m i n a r y )
S25FL129P_00_04 November 2, 2009

Related parts for S25FL129P