S25FL129P Meet Spansion Inc., S25FL129P Datasheet - Page 48

• Manufacturer Part Number: S25FL129P
• Description: 128-mbit Cmos 3.0 Volt Flash Memory With 104-mhz Spi Serial Peripheral Interface Multi I/o Bus
• Manufacturer: Meet Spansion Inc.

9.19
48
Deep Power-Down (DP)
The Deep Power-Down (DP) command provides the lowest power consumption mode of the device. It is
intended for periods when the device is not in active use, and ignores all commands except for the Release
from Deep Power-Down (RES) command. The DP mode therefore provides the maximum data protection
against unintended write operations. The standard standby mode, which the device goes into automatically
when CS# is high (and all operations in progress are complete), should generally be used for the lowest
power consumption when the quickest return to device activity is required.
The host system must drive CS# low, and then write the DP command on SI. CS# must be driven low for the
entire duration of the DP sequence. The command sequence is shown in
on page
The host system must drive CS# high after the device has latched the 8th bit of the DP command, otherwise
the device does not execute the command. After a delay of t
reduces from I
Once the device has entered the DP mode, all commands are ignored except the RES command (which
releases the device from the DP mode). The RES command also provides the Electronic Signature of the
device to be output on SO, if desired (see
DP mode automatically terminates when power is removed, and the device always powers up in the standard
standby mode. The device rejects any DP command issued while it is executing a program, erase, or Write
Registers operation, and continues the operation uninterrupted.
SCK
CS#
SO
SI
25.
Hi-Z
Mode 3
Mode 0
SB
to I
DP
(see
Figure 9.22 Deep Power-Down (DP) Command Sequence
0
Table 16.1 on page
1
D a t a
2
Command
S25FL129P
3
S h e e t
Section 9.20
4
58).
5
Standby Mode
6
( P r e l i m i n a r y )
and 9.20.1).
7
DP,
the device enters the DP mode and current
t DP
S25FL129P_00_04 November 2, 2009
Figure 9.22
Deep Power-down Mode
and
Table 9.1