S25FL129P Meet Spansion Inc., S25FL129P Datasheet - Page 47

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S25FL129P

Manufacturer Part Number
S25FL129P
Description
128-mbit Cmos 3.0 Volt Flash Memory With 104-mhz Spi Serial Peripheral Interface Multi I/o Bus
Manufacturer
Meet Spansion Inc.
Datasheet

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9.18
November 2, 2009 S25FL129P_00_04
Bulk Erase (BE)
The Bulk Erase (BE) command sets all the bits within the entire memory array to logic 1s. A WREN command
is required prior to writing the BE command.
The host system must drive CS# low, and then write the BE command on SI. CS# must be driven low for the
entire duration of the BE sequence. The command sequence is shown in
on page
The host system must drive CS# high after the device has latched the 8th bit of the CE command, otherwise
the device does not execute the command. The BE operation begins as soon as CS# is driven high. The
device internally controls the timing of the operation, which requires a period of t
be read to check the value of the Write In Progress (WIP) bit while the BE operation is in progress. The WIP
bit is 1 during the BE operation, and is 0 when the operation is completed. The device internally resets the
Write Enable Latch to 0 before the operation completes (the exact timing is not specified).
The device only executes a BE command if all Block Protect bits (BP2:BP0) are 0 (see
on page
25.
17). Otherwise, the device ignores the command.
D a t a
SO
CS#
SCK
SI
S h e e t
Mode 3
Mode 0
Hi-Z
Figure 9.21 Bulk Erase (BE) Command Sequence
( P r e l i m i n a r y )
S25FL129P
0
1
2
Command
3
4
5
6
Figure 9.21
7
BE
. The Status Register may
and
Table 7.3
Table 9.1
47

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