cs4362 Cirrus Logic, Inc., cs4362 Datasheet
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cs4362
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cs4362 Summary of contents
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... The CS4362 is available in a 48-pin LQFP package in Commercial grade (-10°C to +70°C). The CDB4362 Customer Demonstration Board is also available for de- vice evaluation and implementation suggestions. ...
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... Functional Mode (FM) ...................................................................................................... 23 4.7 Volume Control (addresses 07h, 08h, 0Ah, 0Bh, 0Dh, 0Eh) ....................................................... 23 4.7.1 Mute (MUTE) ................................................................................................................... 23 4.7.2 Volume Control (xx_VOL) ................................................................................................ 23 4.8 Chip Revision (address 12h) ........................................................................................................ 24 4.8.1 Part Number ID (PART) [Read Only] ............................................................................... 24 5. PIN DESCRIPTION .............................................................................................................................. 25 6. APPLICATIONS .................................................................................................................................. 28 6.1 Grounding and Power Supply Decoupling .................................................................................... 28 2 ® FORMAT ........................................... 11 ............................................................................................... 13 CS4362 21 DS257F2 ...
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... Figure 19. Double-Speed (fast) Transition Band (detail)............................................................................ 34 Figure 20. Double-Speed (fast) Passband Ripple...................................................................................... 34 Figure 21. Double-Speed (slow) Stopband Rejection ................................................................................ 35 Figure 22. Double-Speed (slow) Transition Band ...................................................................................... 35 Figure 23. Double-Speed (slow) Transition Band (detail) .......................................................................... 35 Figure 24. Double-Speed (slow) Passband Ripple .................................................................................... 35 Figure 25. Quad-Speed (fast) Stopband Rejection .................................................................................... 35 Figure 26. Quad-Speed (fast) Transition Band .......................................................................................... 35 DS257F2 ...................................................................................................................... 37 (detail) .......................................................................... 33 CS4362 3 ...
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... Table 2. Digital Interface Formats - DSD Mode ......................................................................................... 18 Table 3. ATAPI Decode ............................................................................................................................. 22 Table 4. Example Digital Volume Settings ................................................................................................. 23 Table 5. Common Clock Frequencies........................................................................................................ 27 Table 6. Digital Interface Format, Stand-Alone Mode Options................................................................... 27 Table 7. Mode Selection, Stand-Alone Mode Options ............................................................................... 27 Table 8. Direct Stream Digital (DSD), Stand-Alone Mode Options ............................................................ 27 4 (detail).......................................................................... 36 CS4362 DS257F2 ...
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... For Double-Speed Mode kHz, SCLK = 6.144 MHz, MCLK = 12.288 MHz; For Quad-Speed Mode 192 kHz, SCLK = 12.288 MHz, MCLK = 24.576 MHz; For Direct Stream Digital Mode 128 x 48 kHz, DSD_SCLK = 6.144 MHz, MCLK = 12.288 MHz). Parameters CS4362-KQZ Dynamic Performance - All PCM modes and DSD Specified Temperature Range Dynamic Range (Note 2) ...
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... VLS (Note 8) (Note 5) normal operation power-down (Note 8) normal operation power-down (Note 8) θ multi-layer JA θ dual-layer JA θ kHz) PSRR (60 Hz) and includes attenuation due CS4362 Typ Max Units 91% V 96% V Vpp VDC A μ 0.1 - 100 - ppm/°C 100 - - - kΩ ...
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... Fs = 44.1 kHz - - kHz - - -0.01 - .583 - (Note 13 4.6/ kHz - - ±0.03/ -0.01 - .635 - (Note 13 4.7/ kHz - - ±0.01/ CS4362 Slow Roll-Off (Note 10) Max Min Typ Max (Note 11) .454 0 - 0.417 .499 0 - 0.499 +0.01 -0.01 - +0.01 - .583 - - - 6.5/ ±0.14/Fs ±0. ±0.23 ±0. ±0.14 ±0. ±0.09 (Note 11) .430 ...
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... Control port interface power VLC Min Typ Max 70% VLS - - 70% VLC - - - - 20% VLS - - 20% VLC - - ± Min Max -0.3 6.0 -0.3 6.0 -0.3 6.0 -0.3 6.0 - ±10 -0.3 VLS+ 0.4 -0.3 VLC+ 0.4 -55 125 A -65 150 Min Typ Max 4.5 5.0 5.5 3.0 3.3 5.5 1.8 5.0 5.5 1.8 5.0 5.5 CS4362 Units μ Units °C °C Units DS257F2 ...
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... MCLK frequencies LRCK t slrs t slrd t sclkl SCLK t sdlrs Figure 1. Serial Mode Input Timing CS4362 = 30 pF) L Min Typ Max 1.024 - 51.2 6.400 - 51.2 6.400 - 51 100 100 - 200 45 50 ...
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... DSD_L, DSD_R Figure 2. Direct Stream Digital - Serial Audio Input Timing 10 Symbol Min (Note 18) 4.096 (All DSD t sclkl t sclkh (64x Oversam- 1.024 2.048 (128x Oversampled) t sdlrs t sdh t sclkl t t sdlrs sdh CS4362 = 30 pF) L Typ Max Unit - 38.4 MHz 3.2 MHz - 6.4 MHz ...
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... Double-Speed Mode, × 128 Fs t high t t sud t ack hdd Figure 3. Control Port Timing - I²C Format CS4362 FORMAT ® pF) L Min Max - 100 500 - 4.7 - 4.0 - 4.7 - 4 250 - - 300 fc 4 ...
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... Figure 4. Control Port Timing - SPI Format CS4362 = 30 pF) L Min Max Unit - MCLK MHz ---------------- - 2 500 - ns 500 - ns 1.0 - µ ---------------- - MCLK - ns 1 ---------------- - ...
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... UTE FILT 0.1 µ CS4362 + 0.1 µF 1 µ nalog Conditioning 40 and M uting 38 A nalog Conditioning 37 and M uting 35 A nalog Conditioning 36 and M uting 34 A nalog Conditioning ...
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... M3(DS D_SCLK ) AO UTB UTB3 UTEC6 RST FILT 0.1 µ CS4362 + 0.1 µF 1 µF 39 Analog Conditioning 40 and M uting 41 38 Analog Conditioning 37 and M uting 26 35 Analog Conditioning 36 and M uting 25 34 Analog Conditioning ...
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... B2_VOL4 P3ATAPI4 P3ATAPI3 P3ATAPI2 P3ATAPI1 A3_VOL6 A3_VOL5 A3_VOL4 B3_VOL6 B3_VOL5 B3_VOL4 PART2 PART1 PART0 CS4362 Reserved SDIN3CLK SDIN2CLK SDIN1CLK AMUTE MUTEC1 Reserved DEM1 DEM0 INV_B2 INV_A2 INV_B1 P1ATAPI0 P1FM1 ...
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... When the bit is set, the respective DAC channel pair (AOUTAx and AOUTBx) will remain in a reset state advised that changes to these bits be made while the power-down (PDN) bit is enabled to eliminate the possibility of audible artifacts Reserved DAC3_DIS CS4362 DAC2_DIS DAC1_DIS PDN DS257F2 ...
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... DIF0 Reserved DESCRIPTION Left Justified 24-bit data I² 24-bit data Right Justified, 16-bit data Right Justified, 24-bit data Right Justified, 20-bit data Right Justified, 18-bit data Reserved Reserved CS4362 2 1 SDIN3CLK SDIN2CLK SDIN1CLK 0 0 Figures 33 to 38. Format FIGURE 0 1 ...
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... DSD data with a 3x MCLK to DSD data rate 128x oversampled DSD data with a 4x MCLK to DSD data rate 128x oversampled DSD data with a 6x MCLK to DSD data rate “Clock Source Selection” on page RMP_UP Reserved CS4362 29 AMUTE MUTEC1 MUTEC0 1 0 DS257F2 Note * ...
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... When set to 1 the MUTEC pin(s) are low when active. Note: When the on board mute circuitry is designed for active low, the MUTEC outputs will be high (un- muted) for the period of time during reset and before this bit is enabled to 1. DS257F2 CS4362 19 ...
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... This Function allows the user to select whether the interpolation filter has a fast or slow roll off. For filter characteristics please see 4.4.2 De-Emphasis Control (DEM) Default = Disabled 01 - 44.1 kHz kHz kHz Function FILT_SEL Reserved Section 1. Characteristics and Specifications. CS4362 DEM1 DEM0 RMP_DN DS257F2 ...
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... A Channel Attenuation and Volume Control Bytes (per A-B pair), and the B Channel Bytes are ignored when this function is enabled. DS257F2 Figure 39 INV_A3 INV_B2 PxATAPI2 PxATAPI1 CS4362 INV_A2 INV_B1 INV_A1 PxATAPI0 PxFM1 PxFM0 ...
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... ATAPI Channel Mixing and Muting (ATAPI) Default = 01001 - AOUTAx=aL, AOUTBx=bR (Stereo) Function: The CS4362 implements the channel mixing functions of the ATAPI CD-ROM specification. The ATAPI functions are applied per A-B pair. Refer to ATAPI4 ATAPI3 ATAPI2 ...
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... MUTE bit. Binary Code DS257F2 xx_VOL4 xx_VOL3 Decimal Value 0000000 0 0010100 20 0101000 40 0111100 60 1011010 90 Table 4. Example Digital Volume Settings CS4362 xx_VOL2 xx_VOL1 xx_VOL0 Table 4. The volume changes are imple- Volume Setting 0 dB -20 dB -40 dB - ...
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... Chip Revision (address 12h PART3 PART2 PART1 1 1 4.8.1 Part Number ID (PART) [Read Only] 1110 - CS4362 Function: This read-only register can be used to identify the model number of the device PART0 Reserved CS4362 Reserved Reserved Reserved - - - DS257F2 ...
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... DSDA2 1 DSDB1 2 DSDA1 GND 5 6 MCLK CS4362 LRCK1(DSD_EN) 7 SDIN1 8 SCLK1 9 LRCK2 10 SDIN2 11 SCLK2 Pin Description CS4362 36 AOUTA2- 35 AOUTA2+ 34 AOUTB2+ 33 AOUTB2 GND 31 30 AOUTA3- 29 AOUTA3+ AOUTB3 AOUTB3- 26 MUTEC2 25 MUTEC3 Table 5 25 ...
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... DSDB2 48 DSDA3 47 DSDB3 46 DSD_SCLK 42 DSD Serial Clock (Input) - Serial clock for the Direct Stream Digital serial audio interface. DSD Enable (Input) - When held at logic ‘1’ the device will enter DSD Mode (Stand-Alone Mode DSD_EN 7 only). 26 Pin Description CS4362 Tables 6 DS257F2 ...
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... DSD data with a 4x MCLK to DSD data rate 0 Reserved 1 Reserved 0 Reserved 1 128x oversampled DSD data with a 2x MCLK to DSD data rate 0 Reserved 1 Reserved 0 Reserved 1 CS4362 Control Port Only Modes 512x 768x 1024x* 16.3840 24.5760 32.7680 22.5792 33.8688 45.1584 24.5760 36.8640 49.1520 256x ...
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... PCM Mode Select The CS4362 operates in one of three PCM oversampling modes based on the input sample rate. Mode se- lection is determined by the M3 and M2 pins in Stand-Alone Mode or the FM bits in Control Port Mode. Sin- gle-Speed Mode supports input sample rates kHz and uses a 128x oversampling ratio. Double- Speed Mode supports input sample rates up to 100 kHz and uses an oversampling ratio of 64x ...
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... DAC functions (such as changing sample rates or clock sources). The mute bits may then be released after clocks have settled and the proper CS4362 modes have been set required that the CS4362 be held in reset if the minimum high/low time specs of MCLK can not be met during clock source changes. ...
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... The control port has 2 formats: SPI and I²C, with the CS4362 operating as a slave device. If I²C operation is desired, AD0/CS should be tied to VLC or GND. If the CS4362 ever detects a high to low transition on AD0/CS after power-up and after the control port is activated, SPI format will be selected. ...
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... SPI Format In SPI format the CS4362 chip select signal, CCLK is the control port bit clock, CDIN is the input data line from the microcontroller and the chip address is 0011000. CS, CCLK and CDIN are all inputs and data is clocked in on the rising edge of CCLK. ...
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... When Auto Map Increment is enabled, the register must be written it two separate blocks: from register 01h to 08h and then from 09h and 11h. The counter will not auto-increment to register 09h from register 08h 7.5.2 MAP4-0 (Memory Address Pointer) Default = ‘00000’ MAP4 MAP3 CS4362 MAP2 MAP1 MAP0 DS257F2 ...
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... Frequency(normalized to Fs) Figure 13. Single-Speed (slow) Stopband Rejection DS257F2 100 120 0.4 0.42 0.8 0.9 1 Figure 10. Single-Speed (fast) Transition Band 0.02 0.015 0.01 0.005 0 0.005 0.01 0.015 0.02 0.52 0.53 0.54 0.55 0 0.05 Figure 12. Single-Speed (fast) Passband Ripple 100 120 0.8 0.9 1 0.4 0.42 Figure 14. Single-Speed (slow) Transition Band CS4362 0.44 0.46 0.48 0.5 0.52 0.54 0.56 0.58 Frequency(normalized to Fs) 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 Frequency(normalized to Fs) 0.44 0.46 0.48 0.5 0.52 0.54 0.56 0.58 Frequency(normalized to Fs) 0.6 0.5 0.6 33 ...
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... Figure 19. Double-Speed (fast) Transition Band (detail) 34 0.02 0.015 0.01 0.005 0 0.005 0.01 0.015 0.02 0 0.05 0.52 0.53 0.54 0.55 Figure 16. Single-Speed (slow) Passband Ripple 100 120 0.4 0.42 0.8 0.9 1 Figure 18. Double-Speed (fast) Transition Band 0.02 0.015 0.01 0.005 0 0.005 0.01 0.015 0.02 0.52 0.53 0.54 0.55 0 0.05 Figure 20. Double-Speed (fast) Passband Ripple CS4362 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 Frequency(normalized to Fs) 0.44 0.46 0.48 0.5 0.52 0.54 0.56 0.58 Frequency(normalized to Fs) 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 Frequency(normalized to Fs) DS257F2 0.5 0.6 0.5 ...
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... Frequency(normalized to Fs) Figure 25. Quad-Speed (fast) Stopband Rejection DS257F2 100 120 0.2 0.7 0.8 0.9 1 Figure 22. Double-Speed (slow) Transition Band 0.02 0.015 0.01 0.005 0 0.005 0.01 0.015 0.02 0 0.52 0.53 0.54 0.55 Figure 24. Double-Speed (slow) Passband Ripple 100 120 0.7 0.8 0.9 1 0.2 Figure 26. Quad-Speed (fast) Transition Band CS4362 0.3 0.4 0.5 0.6 0.7 Frequency(normalized to Fs) 0.05 0.1 0.15 0.2 0.25 0.3 Frequency(normalized to Fs) 0.3 0.4 0.5 0.6 0.7 Frequency(normalized to Fs) 0.8 0.35 0.8 35 ...
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... Frequency(normalized to Fs) Figure 31. Quad-Speed (slow) Transition Band (detail) 36 0.2 0.15 0.1 0.05 0 0.05 0.1 0.15 0.2 0 0.52 0.53 0.54 0.55 Figure 28. Quad-Speed (fast) Passband Ripple 100 120 0.1 0.2 0.7 0.8 0.9 1 Figure 30. Quad-Speed (slow) Transition Band 0.02 0.015 0.01 0.005 0 0.005 0.01 0.015 0.02 0.52 0.53 0.54 0.55 0 0.02 Figure 32. Quad-Speed (slow) Passband Ripple CS4362 0.05 0.1 0.15 0.2 0.25 Frequency(normalized to Fs) 0.3 0.4 0.5 0.6 0.7 0.8 Frequency(normalized to Fs) 0.04 0.06 0.08 0.1 Frequency(normalized to Fs) DS257F2 0.9 0.12 ...
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... LSB MSB + LSB MSB Figure 34. Format 1 - I² 24-bit Data CS4362 Right Channel + LSB Right Channel + LSB Right Channel ...
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... Gain dB T1=50 µs 0dB F1 F2 3.183 kHz 10.61 kHz Figure 39. De-Emphasis Curve CS4362 Right Channel Right Channel µs Frequency ...
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... SDINx Right Chan nel Audio D ata Figure 41. ATAPI Block Diagram (x = channel pair DS257F2 DAC Channel Pair x Control DAC A Channel Volume Control Σ B Channel Volume Control Figure 42. Recommended Output Filter CS4362 AOUTAx+ AOUTAx- AOUTBx+ AOUTBx- MUTE Aout Ax Σ MUTE AoutBx 39 ...
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... Convention of the Audio Engineering Society, October 1992. 2. CDB4362 Evaluation Board Data Sheet, available at http:www.cirrus.com. 3. Design Notes for a 2-Pole Filter with Differential Input by Steven Green. Cirrus Logic Application Note AN48, available at http:www.cirrus.com. 4. The I²C-Bus Specification: Version 2.0, Philips Semiconductors, December 1998. http://www.semiconductors.philips.com 40 CS4362 DS257F2 ...
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... INCHES NOM MAX 0.055 0.063 0.004 0.006 0.009 0.011 0.354 0.366 0.28 0.280 0.354 0.366 0.28 0.280 0.020 0.024 0.24 0.030 4° 7.000° * Nominal pin pitch is 0.50 mm Controlling dimension is mm. JEDEC Designation: MS022 CS4362 A A1 MILLIMETERS MIN NOM MAX --- 1.40 1.60 0.05 0.10 0.15 0.17 0.22 0.27 8.70 9.0 BSC 9.30 6.90 7.0 BSC 7.10 8.70 9.0 BSC 9.30 6.90 7.0 BSC 7 ...
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... Product Description Package Pb-Free 114 dB, 192 kHz 6- CS4362 channel D/A Converter CDB4362 CS4362 Evaluation Board 14.REVISION HISTORY Release Removed -BQ ordering option Corrected specifications for Full-Scale Differential Output Voltage Updated legal text Incorporated changes outlined in ER257B3 and ER257F1: Corrected pin order for analog outputs in the pin description ...