mg87fe Megawin Technology, mg87fe Datasheet - Page 17

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mg87fe

Manufacturer Part Number
mg87fe
Description
8 Bits Microcontroller
Manufacturer
Megawin Technology
Datasheet

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There are two extra SFR designed to configure timer T2. They are T2MOD, and T2CON.
T2MOD
T2CON
T2MOD
T2CON
Name
Name
CP/RL2
EXEN2
DCEN
T2OE
RCLK
TCLK
EXF2
C//T2
TR2
TF2
Bit7
Bit7
TF2
Timer2 overflow flag. It will be set by Timer2 overflow and must be cleared by
software. TF2 will not be set when either TCLK or RCLK =1.
When this bit was set and will cause the serial port to use Timer2 overflow pulse
for its transmit-clock in mode-1 and mode-3. TCLK=0 will cause Timer1 overflow
pulse to be used.
Timer-2 output enable bit.
Down Count Enable bit. When set, this will allow Timer2 to be configured as a
down counter.
Timer2 external flag. It will be set when either a capture or reload is caused by a
negative transition on pin T2EX and EXEN2=1. When Timer2 interrupt is enabled,
EXF2=1 will cause the CPU vector to the Timer2 interrupt routine. EXF2 must be
cleared by software. EXF2 does not cause an interrupt in Auto-Reload Up-Down
mode (ARUD).
When this bit was set and will cause the serial port to use Timer2 overflow pulse
for its receive-clock in mode-1 and mode-3. RCLK=0 will cause Timer1 overflow
pulse to be used.
Timer-2 external enable flag. When set, allows a capture or reload to be occurred.
As a result of a negative transition on T2EX, if Timer2 is not used to clock the
serial port. EXEN2=0 will cause Timer2 to ignore events at T2EX.
Start/Stop control bit for Timer2.
=0, will set as Timer function; =1, will set as external event counter.
Capture/Reload flag. When set, captures will occurs on a negative transition at
T2EX if EXEN2=1. When cleared, auto-reload function will occur either with
Timer2 overflows or a negative transition at T2EX when EXEN2=1. When whether
TCLK or RCLK is 1, this bit is ignored and the timer is forced to auto-reload on
Timer2 overflow.
-
Megawin Technology Co., Ltd.
EXF2
Bit6
Bit6
-
RCLK
Bit5
Bit5
-
Preliminary
It enables Timer2 overflow rate to toggle P1.0
TCLK
Bit4
Bit4
-
EXEN2
ver 1.3
Bit3
Bit3
-
TR2
Bit2
Bit2
Date: 2009-JAN-20
-
MG87FE/L52
T2OE
C//T2
Bit1
Bit1
CP/RL2
DCEN
Bit0
Bit0
17

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