mg87fe Megawin Technology, mg87fe Datasheet - Page 25

• Manufacturer Part Number: mg87fe
• Description: 8 Bits Microcontroller
• Manufacturer: Megawin Technology

Frame Error Detection
A missing bit in stop bit will set the FE bit in the SCON register. The FE bit shares the SCON bit 7
with SM0 and its actual function for SCON.7 is determined by SMOD0(PCON.6). If SMOD0 is
set, SCON.7 functions as FE, otherwise functions as SM0. When used as FE bit, it can only be
cleared by software.
SCON register
SM0, SM1: Serial Port Mode bit 0/1, it is enabled to access by clearing SMOD0.
SCON
Name
FE
REN
SM2
RB8
TB8
RI
TI
SM0
SM0/FE
0
0
1
1
Frame Error bit. This bit is set by the receiver when an invalid stop bit is detected.
The FE bit is not cleared by valid frames but should be cleared by software. The
SMOD0 (PCON.6) bit must be set to enable access to the FE bits.
Bit7
Enable the automatic address recognition feature in mode 2 and 3. If SM2=1, RI
will not be set unless the received 9th data bit is 1, indicating an address, and the
received byte is a given or Broadcast address. In mode1, if SM2=1 then RI will not
be set unless a valid stop bit was received, and the received byte is a Given or
Broadcast address.
When set will enable serial reception.
The 9th data bit which will be transmitted in mode 2 and 3.
In mode 2 and 3, the received 9th data bit will go into this bit.
Transmit interrupt flag.
Receive interrupt flag.
Megawin Technology Co., Ltd.
SM1
0
1
0
1
SM1
Bit6
8-bit shift register
Description
8-bit UART
9-bit UART
9-bit UART
SM2
Bit5
Preliminary
* Please refer to page-14 figure 7-3-2 for “CLKin” signal.
REN
Bit4
CLKin/64 or CLKin/32
ver 1.3
Bit3
TB8
Baud Rate
CLKin/12
Variable
Variable
RB8
Bit2
Date: 2009-JAN-20
MG87FE/L52
Bit1
TI
Bit0
RI
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