s29gl128n Meet Spansion Inc., s29gl128n Datasheet - Page 47

• Manufacturer Part Number: s29gl128n
• Description: 3.0 Volt-only Page Mode Flash Memory Featuring 110 Nm Mirrorbit ?rocess Technology
• Manufacturer: Meet Spansion Inc.

D a t a
S h e e t
Hardware Data Protection
The command sequence requirement of unlock cycles for programming or erasing provides
data protection against inadvertent writes (refer to
T able 12 on page 63
and
T able 14 on
page 65
for command definitions). In addition, the following hardware data protection mea-
sures prevent accidental erasure or programming, which might otherwise be caused by
spurious system level signals during V
power-up and power-down transitions, or from sys-
CC
tem noise.
Low V
Write Inhibit
CC
When V
is less than V
, the device does not accept any write cycles. This protects data
CC
LKO
during V
power-up and power-down. The command register and all internal program/erase
CC
circuits are disabled, and the device resets to the read mode. Subsequent writes are ignored
until V
is greater than V
. The system must provide the proper signals to the control pins
CC
LKO
to prevent unintentional writes when V
is greater than V
.
CC
LKO
Write Pulse Glitch Protection
Noise pulses of less than 5 ns (typical) on OE#, CE# or WE# do not initiate a write cycle.
Logical Inhibit
Write cycles are inhibited by holding any one of OE# = V
, CE# = V
or WE# = V
. To ini-
IL
IH
IH
tiate a write cycle, CE# and WE# must be a logical zero while OE# is a logical one.
Power-Up Write Inhibit
If WE# = CE# = V
and OE# = V
during power up, the device does not accept commands
IL
IH
on the rising edge of WE# . The internal state machine is automatically reset to the read mode
on power-up.
S29GL-N_00_B3 October 13, 2006
S29GL-N MirrorBit™ Flash Family
45