s29ns01gr Meet Spansion Inc., s29ns01gr Datasheet - Page 61

• Manufacturer Part Number: s29ns01gr
• Description: S29ns01gr 1gb 64 M X 16 Bit , 1.8 V Burst Simultaneous Read/write, Multiplexed Mirrorbit Flash Memory
• Manufacturer: Meet Spansion Inc.

Legend
X = Don’t care
RA = Address of the location to be read.
RD = Read Data from location RA during read operation.
RR = Read Register value
PA = Address of the memory location to be programmed.
PD = Data to be programmed at location PA.
BA = Address bits sufficient to select a bank
SA = Address bits sufficient to select a sector
SLA = Sector Lock Address
WBL = Write Buffer Location. Address must be within the same write buffer page as PA.
WC = Word Count. Number of write buffer locations to load minus 1.
Notes
1. See
2. Except for the following, all bus cycles are write cycle: read cycle during Read, ID/CFI Read (Manufacturing ID, Device ID, Indicator Bits), Configuration Register
3. Data bits DQ15–DQ8 are don’t care in command sequences, except for RD, PD, and WD.
4. Writing incorrect address and data values or writing them in the improper sequence may place the device in an unknown state. The system must write the reset
5. The Program Resume command is valid only during the Program Suspend mode/state.
6. The Erase Resume command is valid only during the Erase Suspend mode/state.
7. Command is valid when all banks are ready to read array data.
8. The total number of cycles in the command sequence is determined by the number of words written to the write buffer.
9. V
10. Entry commands are needed to enter a specific mode to enable instructions only available within that mode.
11. Must be the lowest word address of the words being programmed within the 32 word write buffer page. This is not necessarily the lowest address of the page.
12. Subsequent addresses must fall within the same Sector and Page as the initial starting address.
May 9, 2008 S29NS-R_00_03
read, Secure Silicon Region Read, SSR Lock Read, and 2nd cycle of Status Register Read
command to return the device to reading array data
Data words are loaded into the write page buffer in sequential order from lowest to highest address.
PP
SSR Lock Entry
(7) (10)
Write Buffer Load
Buffer to Flash
SSR Lock Read
SSR Lock Exit
Secure Silicon Region Entry
(7) (10)
Write Buffer Load
Buffer to Flash
Secure Silicon Region Read
Secure Silicon Region Exit
Command Sequence
Section 7., Device Operations on page 23
must be at V
HH
during the entire operation of this command
(8)
(8)
D a t a
4-35
1
3
1
1
1
1
1
1
1
S h e e t
(SA) AAA
(SA) AAA
(SA) AAA
(SA) XXX
(SA) AAA
(SA) AAA
(SA) AAA
(SA) 555
(SA) 555
(SA) 555
(SA) 555
(SA) 555
(SA) 555
(SA) RA
Addr
XXX
XXX
Table 11.1 Command Definitions (Sheet 2 of 2)
for description of bus operations.
First
( A d v a n c e
Secure Silicon Region Command Definitions
S29NS-R MirrorBit
Data
RR
RD
40
25
29
F0
88
25
29
F0
SSR Lock Command Definitions
(SA) 2AA
(SA) 2AA
(SA) 554
(SA) 554
Addr
I n f o r m a t i o n )
Second
®
Flash Family
Bus Cycles (Notes 1–4)
Data
WC
0
(SA) PA
(SA) 00
Addr
Third
Data
PD
PD
(SA) PA
Addr
Fourth
Data
PD
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