s29jl064j Meet Spansion Inc., s29jl064j Datasheet - Page 32

• Manufacturer Part Number: s29jl064j
• Description: 64 Megabit 8m X 8-bit/4m X 16-bit Cmos 3.0 Volt-only, Simultaneous Read/write Flash Memory
• Manufacturer: Meet Spansion Inc.

10.3
10.4
10.5
32
Autoselect Command Sequence
Enter Secured Silicon Region/Exit Secured Silicon Region Command
Sequence
Byte/Word Program Command Sequence
The autoselect command sequence allows the host system to access the manufacturer and device codes,
and determine whether or not a sector is protected. The autoselect command sequence may be written to an
address within a bank that is either in the read or erase-suspend-read mode. The autoselect command may
not be written while the device is actively programming or erasing in another bank.
The autoselect command sequence is initiated by first writing two unlock cycles. This is followed by a third
write cycle that contains the bank address and the autoselect command. The bank then enters the autoselect
mode. The system may read any number of autoselect codes without re-initiating the command sequence.
Table 10.1 on page 36
information, the system must write to the appropriate bank address (BA) and sector address (SA).
on page 20
The system must write the reset command to return to the read mode (or erase-suspend-read mode if the
bank was previously in Erase Suspend).
The system can access the Secured Silicon Region by issuing the three-cycle Enter Secured Silicon Region
command sequence. The device continues to access the Secured Silicon Region until the system issues the
four-cycle Exit Secured Silicon Region command sequence. The Exit Secured Silicon Region command
sequence returns the device to normal operation. The Secured Silicon Region is not accessible when the
device is executing an Embedded Program or embedded Erase algorithm.
address and data requirements for both command sequences. See also
further information. Note that the ACC function and unlock bypass modes are not available when the Secured
Silicon Region is enabled.
The system may program the device by word or byte, depending on the state of the BYTE# pin. Programming
is a four-bus-cycle operation. The program command sequence is initiated by writing two unlock write cycles,
followed by the program set-up command. The program address and data are written next, which in turn
initiate the Embedded Program algorithm. The system is not required to provide further controls or timings.
The device automatically provides internally generated program pulses and verifies the programmed cell
margin.
sequence.
When the Embedded Program algorithm is complete, that bank then returns to the read mode and addresses
are no longer latched. The system can determine the status of the program operation by using DQ7, DQ6, or
RY/BY#. Refer to
Any commands written to the device during the Embedded Program Algorithm are ignored. Note that a
hardware reset immediately terminates the program operation. The program command sequence should be
reinitiated once that bank has returned to the read mode, to ensure data integrity. Note that the Secured
Silicon Region, autoselect, and CFI functions are unavailable when a program operation is in progress.
Programming is allowed in any sequence and across sector boundaries. A bit cannot be programmed from
0 back to a 1. Attempting to do so may cause that bank to set DQ5 = 1, or cause the DQ7 and DQ6 status
bits to indicate the operation was successful. However, a succeeding read will show that the data is still 0.
Only erase operations can convert a 0 to a 1.
Table 10.1 on page 36
shows the address range and bank number associated with each sector.
Write Operation Status on page 37
shows the address and data requirements. To determine sector protection
shows the address and data requirements for the byte program command
S29JL064J
D a t a
for information on these status bits.
S h e e t
Secured Silicon Region on page 26
Table 10.1 on page 36
S29JL064J_00_03 April 7, 2011
shows the
Table 8.3
for