s908gr32ag3vfa Freescale Semiconductor, Inc, s908gr32ag3vfa Datasheet - Page 153

• Manufacturer Part Number: s908gr32ag3vfa
• Description: M68hc08 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

13.3 Pin Name Conventions
The generic names of the ESCI input/output (I/O) pins are:
ESCI I/O lines are implemented by sharing parallel I/O port pins. The full name of an ESCI input or output
reflects the name of the shared port pin.
ESCI I/O pins. The generic pin names appear in the text of this section.
13.4 Functional Description
Figure 13-3
serial communication between the MCU and remote devices, including other MCUs. The transmitter and
receiver of the ESCI operate independently, although they use the same baud rate generator. During
normal operation, the CPU monitors the status of the ESCI, writes the data to be transmitted, and
processes received data.
The baud rate clock source for the ESCI can be selected via the configuration bit, SCIBDSRC, of the
CONFIG2 register ($001E)
For reference, a summary of the ESCI module input/output registers is provided in
13.4.1 Data Format
The SCI uses the standard non-return-to-zero mark/space data format illustrated in
Freescale Semiconductor
•
•
RxD (receive data)
TxD (transmit data)
shows the structure of the ESCI module. The ESCI allows full-duplex, asynchronous, NRZ
START
START
MC68HC908GR60A • MC68HC908GR48A • MC68HC908GR32A Data Sheet, Rev. 5
BIT
BIT
Generic Pin Names
BIT 0
BIT 0
Full Pin Names
BIT 1
BIT 1
Table 13-1. Pin Name Conventions
BIT 2
BIT 2
Figure 13-2. SCI Data Formats
BIT 3
BIT 3
Table 13-1
(BIT M IN SCC1 CLEAR)
9-BIT DATA FORMAT
(BIT M IN SCC1 SET)
8-BIT DATA FORMAT
BIT 4
BIT 4
PTE1/RxD
RxD
BIT 5
BIT 5
shows the full names and the generic names of the
BIT 6
BIT 6
OR DATA
PARITY
BIT 7
BIT 7
BIT
OR DATA
PARITY
PTE0/TxD
STOP
BIT 8
BIT
BIT
TxD
START
NEXT
STOP
BIT
BIT
START
NEXT
BIT
Figure
Pin Name Conventions
Figure
13-4.
13-2.
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