s908gr32ag3vfa Freescale Semiconductor, Inc, s908gr32ag3vfa Datasheet - Page 183

no-image

s908gr32ag3vfa

Manufacturer Part Number
s908gr32ag3vfa
Description
M68hc08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Chapter 14
System Integration Module (SIM)
14.1 Introduction
This section describes the system integration module (SIM). Together with the central processor unit
(CPU), the SIM controls all microcontroller unit (MCU) activities. A block diagram of the SIM is shown in
Figure
controller that coordinates CPU and exception timing.
The SIM is responsible for:
Table 14-1
Freescale Semiconductor
Bus clock generation and control for CPU and peripherals:
Master reset control, including power-on reset (POR) and computer operating properly (COP)
timeout
Interrupt arbitration
14-1.
Stop/wait/reset/break entry and recovery
Internal clock control
shows the internal signal names used in this section.
Table 14-1
Signal Name
CGMXCLK
CGMVCLK
CGMOUT
MC68HC908GR60A • MC68HC908GR48A • MC68HC908GR32A Data Sheet, Rev. 5
PORRST
IRST
R/W
IAB
IDB
is a summary of the SIM input/output (I/O) registers. The SIM is a system state
Buffered version of OSC1 from clock generator module (CGM)
PLL output
PLL-based or OSC1-based clock output from CGM module
(Bus clock = CGMOUT divided by two)
Internal address bus
Internal data bus
Signal from the power-on reset module to the SIM
Internal reset signal
Read/write signal
Table 14-1. Signal Name Conventions
Description
183

Related parts for s908gr32ag3vfa