mt48h8m16lf Micron Semiconductor Products, mt48h8m16lf Datasheet - Page 24
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mt48h8m16lf
Manufacturer Part Number
mt48h8m16lf
Description
128mb 8 Meg X 16, 4 Meg X 32 Mobile Sdram
Manufacturer
Micron Semiconductor Products
Datasheet
1.MT48H8M16LF.pdf
(74 pages)
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COMMAND INHIBIT
NO OPERATION (NOP)
LOAD MODE REGISTER (LMR)
ACTIVE
Figure 8:
PDF: 09005aef832ff1ea / Source: 09005aef832ff1ac
sdr_mobile_sdram_cmd_op_timing_dia_fr5.08__4.fm - Rev. B 6/08 EN
ACTIVE Command
The COMMAND INHIBIT function prevents new commands from being executed by the
SDRAM, regardless of whether the CLK signal is enabled. The SDRAM is effectively
deselected. Operations already in progress are not affected.
The NO OPERATION (NOP) command is used to perform a NOP to an SDRAM which is
selected (CS# is LOW). This prevents unwanted commands from being registered during
idle or wait states. Operations already in progress are not affected.
The mode register is loaded via inputs A[0:n] (where An is the most significant address
term), BA0, and BA1(see "Mode Register" on page 34). The LOAD MODE REGISTER
command can only be issued when all banks are idle and a subsequent executable
command cannot be issued until
The ACTIVE command is used to open (or activate) a row in a particular bank for a
subsequent access. The value on the BA0, BA1 inputs selects the bank, and the address
provided selects the row. This row remains active (or open) for accesses until a
PRECHARGE command is issued to that bank. A PRECHARGE command must be issued
before opening a different row in the same bank. Figure 8 shows the ACTIVE command.
BA0, BA1
Address
RAS#
CAS#
WE#
CKE
CLK
CS#
HIGH
128Mb: 8 Meg x 16, 4 Meg x 32 Mobile SDRAM
Address
Address
Bank
Row
24
t
MRD is met.
Don’t Care
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2008 Micron Technology, Inc. All rights reserved.
Commands
Preliminary