mt48h8m16lf Micron Semiconductor Products, mt48h8m16lf Datasheet - Page 55
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mt48h8m16lf
Manufacturer Part Number
mt48h8m16lf
Description
128mb 8 Meg X 16, 4 Meg X 32 Mobile Sdram
Manufacturer
Micron Semiconductor Products
Datasheet
1.MT48H8M16LF.pdf
(74 pages)
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Figure 34:
Burst Read/Single Write
PRECHARGE
Auto Precharge
PDF: 09005aef832ff1ea / Source: 09005aef832ff1ac
sdr_mobile_sdram_cmd_op_timing_dia_fr5.08__4.fm - Rev. B 6/08 EN
Command
BA0, BA1
Address
DQM
CKE
A10
CLK
DQ
t CMS
t CKS
t AS
t AS
t AS
ACTIVE
WRITE – DQM Operation
T0
Row
Row
Bank
t CKH
t CMH
t AH
t AH
t AH
Notes:
t RCD
t CK
1. For this example, BL = 4.
The burst read/single write mode is entered by programming the write burst mode bit
(M9) in the mode register to a logic 1. In this mode, all WRITE commands result in the
access of a single column location (burst of one), regardless of the programmed BL.
READ commands access columns according to the programmed BL and sequence, just
as in the normal mode of operation (M9 = 0).
The PRECHARGE command (see Figure 11 on page 27) is used to deactivate the open
row in a particular bank or the open row in all banks. The bank(s) will be available for a
subsequent row access some specified time (
issued. Input A10 determines whether one or all banks are to be precharged, and in the
case where only one bank is to be precharged, inputs BA0, BA1 select the bank. When all
banks are to be precharged, inputs BA0, BA1 are treated as “Don’t Care.” After a bank has
been precharged, it is in the idle state and must be activated prior to any READ or WRITE
commands being issued to that bank.
Auto precharge is a feature that performs the same individual-bank PRECHARGE func-
tion described above, without requiring an explicit command. This is accomplished by
using A10 to enable auto precharge in conjunction with a specific READ or WRITE
T1
NOP
Disable auto precharge
Enable auto precharge
t CMS
t CL
t DS
Column m
WRITE
T2
D
Bank
IN
t CMH
t DH
m
t CH
T3
NOP
128Mb: 8 Meg x 16, 4 Meg x 32 Mobile SDRAM
55
t DS
D
IN
T4
NOP
Micron Technology, Inc., reserves the right to change products or specifications without notice.
m + 2
t DH
t
RP) after the PRECHARGE command is
t DS
D
IN
T5
NOP
m + 3
t DH
©2008 Micron Technology, Inc. All rights reserved.
NOP
T6
Timing Diagrams
NOP
T7
Preliminary
Don’t Care