pi7c8154a Pericom Semiconductor Corporation, pi7c8154a Datasheet - Page 77

• Manufacturer Part Number: pi7c8154a
• Description: 2-port Pci-to-pci Bridge
• Manufacturer: Pericom Semiconductor Corporation

14.1.1
14.1.2
14.1.3
14.1.4
SIGNAL TYPES
VENDOR ID REGISTER – OFFSET 00h
DEVICE ID REGISTER – OFFSET 00h
COMMAND REGISTER – OFFSET 04h
Signal Type
R/O
R/W
R/WC
R/WR
R/WS
Bit
15:0
Bit
31:16
Bit
0
1
2
3
4
Function
Vendor ID
Function
Device ID
Function
I/O Space Enable
Memory Space
Enable
Bus Master
Enable
Special Cycle
Enable
Memory Write
And Invalidate
Enable
Description
Read Only
Read / Write
Read / Write 1 to Clear
Read / Write 1 to Reset (about 20 clocks)
Read / Write 1 to Set
Type
R/O
Type
R/O
Type
R/W
R/W
R/W
R/O
R/O
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Description
Identifies Pericom as vendor of this device. Hardwired as 12D8h.
Description
Identifies this device as the PI7C8154A. Hardwired as 8154h.
Description
Controls response to I/O access on the primary interface
0: ignore I/O transactions on the primary interface
1: enable response to I/O transactions on the primary interface
Reset to 0
Controls response to memory accesses on the primary interface
0: ignore memory transactions on the primary interface
1: enable response to memory transactions on the primary interface
Reset to 0
Controls ability to operate as a bus master on the primary interface
0: do not initiate memory or I/O transactions on the primary interface and
disable response to memory and I/O transactions on the secondary
interface
1: enables bridge to operate as a master on the primary interfaces for
memory and I/O transactions forwarded from the secondary interface
Reset to 0
No special cycles defined.
Bit is defined as read only and returns 0 when read
Bridge does not generate Memory Write and Invalidate except forwarding
a transaction for another master. Bit is implemented as read only and
returns 0 when read.
ASYNCHRONOUS 2-PORT
JULY 2004 REVISION 1.00
PCI-to-PCI BRIDGE
Advance Information
PI7C8154A