pca2125 NXP Semiconductors, pca2125 Datasheet

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pca2125

Manufacturer Part Number
pca2125
Description
Spi Real Time Clock / Calendar Semiconductors
Manufacturer
NXP Semiconductors
Datasheet
1. Product profile
Table 1.
Symbol
V
DD
Quick reference data
Parameter
supply voltage
1.1 General description
1.2 Features
1.3 Applications
1.4 Quick reference data
The PCA2125 is a CMOS real time clock/calendar optimized for low power consumption
and 125 °C operation. Data is transferred serially via an SPI bus with a maximum data
rate of 8.0 Mbits/s. An alarm and timer function are also available with possibility to
generate a wake-up signal on an interrupt pin.
T
T
T
T
T
T
T
T
T
T
T
T
T
T
PCA2125
SPI Real time clock / calendar
Rev. 00.11 — 30 January 2007
Provides year, month, day, weekday, hours, minutes and seconds based on
32.768 kHz quartz crystal
Resolution: seconds - years
Clock operating voltage: 1.2 to 5.5 V
Low backup current; typical 0.55 µA at V
3 line SPI with separate combinable data input and output
Serial interface (at V
1 second or 1 minute interrupt output
Freely programmable timer with interrupt capability
Freely programmable alarm function with interrupt capability
Integrated oscillator capacitor
Internal power-on reset
Open-drain interrupt pin
Automotive time keeping application
Metering
SPI bus inactive; T
Conditions
SPI bus active; T
DD
= 1.8 to 5.5 V)
amb
amb
= −40 to +125 °C
= 25 °C
DD
= 3.0 V and T
Min
1.2
1.6
amb
Preliminary data sheet
= 25 °C
Typ
-
-
Max
5.5
5.5
Unit
V
V

Related parts for pca2125

pca2125 Summary of contents

Page 1

... Rev. 00.11 — 30 January 2007 1. Product profile 1.1 General description The PCA2125 is a CMOS real time clock/calendar optimized for low power consumption and 125 °C operation. Data is transferred serially via an SPI bus with a maximum data rate of 8.0 Mbits/s. An alarm and timer function are also available with possibility to generate a wake-up signal on an interrupt pin ...

Page 2

... PCA2125 n. INT Pin description PCA2125 Pin Description 1 oscillator input 2 oscillator output 3 Do not connect and do not use as feed through. Connect to V floating pins not allowed not connect and do not use as feed through. Connect to V floating pins not allowed. ...

Page 3

... Name PCA2125TS PCA2125 TSSOP14 plastic thin shrink small outline package; 14 leads; body width 4.4mm PCA2125_00 Preliminary data sheet Pin description PCA2125 Pin Description 12 Do not connect and do not use as feed through. Connect to V floating pins not allowed. 13 clock output (open drain) ...

Page 4

... V DD OSCILLATOR 10 SCL 8 SDO SERIAL BUS 9 SDI 6 CE 200 kΩ Fig 2. Block diagram of PCA2125 5. Device protection diagram Fig 3. Device diode protection diagram PCA2125 PCA2125_00 Preliminary data sheet INT 5 DIVIDER AND 32.768 kHz TIMER 1 Hz CONTROL POR MONITOR LOGIC ADDRESS INTERFACE REGISTER ...

Page 5

... NXP Semiconductors 6. Functional description The PCA2125 contains sixteen 8-bit registers with an auto-incrementing address register, and on-chip 32.768 kHz oscillator with one integrated capacitor, a frequency divider which provides the source clock for the Real Time Clock (RTC), a programmable clock output, and an 8 MHz SPI. ...

Page 6

... AMPM / 10 hour alarm x 10 day alarm countdown timer value, n Rev. 00.11 — 30 January 2007 PCA2125 SPI Real time clock / calendar Bit 3 Bit 2 Bit 1 Bit 0 POR ovrd 12/ AIE seconds minutes hours days x weekdays months ...

Page 7

... NXP Semiconductors 6.2 Reset The PCA2125 includes an internal reset circuit (see the oscillator is stopped. The oscillator may be stopped, for example, by grounding one of the oscillator pins, OSCI or OSCO. The oscillator is also considered to be stopped during the time between power-up and stable crystal resonance. This time may be in the range of 200ms to 2s depending on crystal type, temperature and supply voltage ...

Page 8

... CE CLEAR POR_OVRD 0 = clear override mode 1 = override possible REGISTER minimum 500 ns minimum 500 ns Rev. 00.11 — 30 January 2007 PCA2125 SPI Real time clock / calendar Figure 5). reset 001aaf898 Figure 6. All timings minimum 2000 ns POR override set at this time 001aaf900 © NXP B.V. 2007. All rights reserved. ...

Page 9

... No interrupt generated from the alarm flag 1 Interrupt generated when alarm flag set 0 No interrupt generated from the countdown timer flag 1 Interrupt generated when countdown timer flag set Rev. 00.11 — 30 January 2007 PCA2125 SPI Real time clock / calendar Section Section 6.9 Section 6.10 Section 6.2.1 Table 15 Section Section 6.6.1 Section 6 ...

Page 10

... BCD format for 12 hour mode [1] hours this register holds the current hours coded in BCD format for 24 hour mode Rev. 00.11 — 30 January 2007 PCA2125 SPI Real time clock / calendar Bit 3 Bit 2 Bit 1 Bit ...

Page 11

... These bits may be re-assigned by the user. Although the association of the weekdays counter to the actual weekday is arbitrary, the PCA2125 will assume ‘Sunday’ is 000 and ‘Monday’ is 001 for the purposes of determining the increment for calendar weeks. Table 15: Day Sunday ...

Page 12

... BCD format Hour alarm (address 0A ) bits description HEX Value Description 0 hour alarm is enabled 1 hour alarm is disabled Rev. 00.11 — 30 January 2007 PCA2125 SPI Real time clock / calendar WEEK DAY 001aaf901 © NXP B.V. 2007. All rights reserved ...

Page 13

... HOUR AEN HOUR ALARM = HOUR TIME DAY AEN DAY ALARM = DAY TIME WEEKDAY AEN WEEKDAY ALARM = WEEKDAY TIME Rev. 00.11 — 30 January 2007 PCA2125 SPI Real time clock / calendar E.G. MINUTE AEN1 1 0 set alarm flag, AF 001aaf902 © NXP B.V. 2007. All rights reserved ...

Page 14

... INT when AIE = 1 Flag location in control 2 Bit 7 Bit 6 Bit 5 Bit MSF - Example to clear only TF (bit 2) Bit 7 Bit 6 Bit 5 Bit Rev. 00.11 — 30 January 2007 PCA2125 SPI Real time clock / calendar 45 46 001aaf903 Bit 3 Bit 2 Bit 1 Bit Bit 3 Bit 2 Bit 1 Bit © ...

Page 15

... Hz countdown timer source clock Countdown timer (address 0A ) bits description HEX Symbol Value Description countdown value = n; CountdownPeriod Rev. 00.11 — 30 January 2007 PCA2125 SPI Real time clock / calendar Section Section 6.6.2 Section Section 6.6.2 n -------------------------------------------------------------- - = SourceClockFrequency © NXP B.V. 2007. All rights reserved ...

Page 16

... The status of the MSF does not affect INT pulse generation. If the MSF flag is not cleared prior to the next coming interrupt period, an INT pulse will still be generated. The purpose of the flag is to allow the controlling system to interrogate the PCA2125 and identify the source of the interrupt i.e. minute/second or countdown timer. Table 29: ...

Page 17

... Hz for power saving. 60 Figure 11).. INT Rev. 00.11 — 30 January 2007 PCA2125 SPI Real time clock / calendar is controlled by the timer control register at [1] delay for delay for 255 244 µs 62.256 ms 15.625 ms 3.984 255 hrs 15 min ...

Page 18

... Flag location in control 2 Bit 7 Bit 6 Bit 5 Bit MSF - Rev. 00.11 — 30 January 2007 PCA2125 SPI Real time clock / calendar for details on how the interrupt can maximum timer period 1/64Hz n + 1/64Hz Bit 3 Bit 2 Bit 1 Bit © ...

Page 19

... Example to clear only MSF (bit 5) Bit 7 Bit 6 Bit 5 Bit Example to clear both TF and MSF Bit 7 Bit 6 Bit 5 Bit Rev. 00.11 — 30 January 2007 PCA2125 SPI Real time clock / calendar Bit 3 Bit 2 Bit 1 Bit Bit 3 Bit 2 Bit 1 Bit Bit 3 ...

Page 20

... TF SET PULSE CLEAR GENERATOR 2 TRIGGER CLEAR to interface: AF: ALARM read AF FLAG SET CLEAR 1 seconds in duration. ⁄ 64 Rev. 00.11 — 30 January 2007 PCA2125 SPI Real time clock / calendar INT TI/TP TIE 0 1 AIE 001aaf907 Section 6.6.3. © NXP B.V. 2007. All rights reserved ...

Page 21

... CLEAR INSTRUCTION Figure 13 INT operation (bit INT period ( 1⁄8192 1⁄128 1⁄64 1⁄64 Rev. 00.11 — 30 January 2007 PCA2125 SPI Real time clock / calendar (1) 8th clock 001aaf908 is also valid for the non-pulsed interrupt [1] n > 1 1⁄4096 1⁄64 1⁄64 1⁄64 Section 6 ...

Page 22

... AF INT SCL instruction CLEAR INSTRUCTION Rev. 00.11 — 30 January 2007 PCA2125 SPI Real time clock / calendar (1) 8th clock 001aaf909 Table 8). Figure 15). 8th clock 001aaf910 © NXP B.V. 2007. All rights reserved. ...

Page 23

... CLKOUT FREQUENCY, Hz Typical duty cycle High% : Low% 32768 60:40 to 40:60 16384 50:50 8192 50:50 4096 50:50 2048 50:50 1024 50:50 1 50:50 CLKOUT = 0 Rev. 00.11 — 30 January 2007 PCA2125 SPI Real time clock / calendar Section 6.10. Effect of ‘stop’ No effect No effect No effect CLKOUT = 0 CLKOUT = 0 CLKOUT = 0 CLKOUT = 0 © NXP B.V. 2007. All rights reserved ...

Page 24

... Read time registers to see the first change 7. Apply 64 clock pulses to CLKOUT 8. Read time registers to see the second change. Repeat 7 and 8 for additional increments. PCA2125_00 Preliminary data sheet Rev. 00.11 — 30 January 2007 PCA2125 SPI Real time clock / calendar © NXP B.V. 2007. All rights reserved ...

Page 25

... First increment of time circuits after stop release [1] 1Hz tick Time , HH:MM: are not reset and values can not be predicted externally 12:45:12 Rev. 00.11 — 30 January 2007 PCA2125 SPI Real time clock / calendar Section 6.8). reset tick RES RES RES ...

Page 26

... Rev. 00.11 — 30 January 2007 PCA2125 SPI Real time clock / calendar Comment Pre-scaler is reset. Time circuits are frozen. Pre-scaler is now running transition of F14 increments the time circuits transition of F14 increments the time circuits. © NXP B.V. 2007. All rights reserved ...

Page 27

... Value 0 1 001 to 0F HEX HEX Figure 19). Rev. 00.11 — 30 January 2007 PCA2125 SPI Real time clock / calendar Description When inactive, the interface is reset. Pull-down resistor included. Input may be higher than When CE is inactive, input may float. Input may be higher than V ...

Page 28

... HEX BCD Rev. 00.11 — 30 January 2007 PCA2125 SPI Real time clock / calendar minutes data 10 BCD 001aaf915 Figure 20). In this ...

Page 29

... SPI bus inactive °C amb SPI bus active −40 to 125 °C amb °C amb SPI bus active f = 7.0 MHz SCL f = 1.0 MHz SCL Rev. 00.11 — 30 January 2007 PCA2125 SPI Real time clock / calendar Min Max Unit +6.5 V −0.5 −50 +50 mA −0.5 +6.5 V +6.5 V −0.5 −10 ...

Page 30

... 0 (INT OL DD and CLKOUT 0 0 DD(min) Rev. 00.11 — 30 January 2007 PCA2125 SPI Real time clock / calendar = 60 k Ω pF; unless otherwise s L Min Typ Max [2] - 550 725 - 550 725 - 550 725 [2] - ...

Page 31

... Rev. 00.11 — 30 January 2007 PCA2125 SPI Real time clock / calendar and V with an input voltage swing Max Min Max Min Max 21) 4.76 - 6.25 - 8.0 - 160 - 125 - - 100 - 62 100 - 62 ...

Page 32

... RA0 supercap V CLKOUT DD OSCI OSCO PCA2125 INT V SS Rev. 00.11 — 30 January 2007 PCA2125 SPI Real time clock / calendar t CYC t CER CEH 001aaf917 CE SCL SDI SDO 001aaf918 © NXP B.V. 2007. All rights reserved ...

Page 33

... Direct measurement of OSCO out (accounting for test probe capacitance). PCA2125_00 Preliminary data sheet Figure 22). The frequency is best measured via the −6 ). Average deviations of ±5 minutes per year can be Rev. 00.11 — 30 January 2007 PCA2125 SPI Real time clock / calendar © NXP B.V. 2007. All rights reserved ...

Page 34

... 2 scale (1) ( 0.30 0.2 5.1 4.5 6.6 0.65 1 0.19 0.1 4.9 4.3 6.2 REFERENCES JEDEC JEITA MO-153 Rev. 00.11 — 30 January 2007 PCA2125 SPI Real time clock / calendar SOT402 θ detail X ( θ 0.75 0.4 0.72 8 0.2 0.13 0.1 o ...

Page 35

... Package placement • Inspection and repair • Lead-free soldering versus PbSn soldering 13.3 Wave soldering Key characteristics in wave soldering are: PCA2125_00 Preliminary data sheet Rev. 00.11 — 30 January 2007 PCA2125 SPI Real time clock / calendar © NXP B.V. 2007. All rights reserved ...

Page 36

... Lead-free process (from J-STD-020C) Package reflow temperature (°C) 3 Volume (mm ) < 350 260 260 250 Figure 24. Rev. 00.11 — 30 January 2007 PCA2125 SPI Real time clock / calendar Figure 24) than a PbSn process, thus ≥ 350 220 220 350 to 2000 > 2000 260 260 250 245 ...

Page 37

... PCA2125_00 Preliminary data sheet maximum peak temperature = MSL limit, damage level minimum peak temperature = minimum soldering temperature Rev. 00.11 — 30 January 2007 PCA2125 SPI Real time clock / calendar peak temperature time 001aac844 © NXP B.V. 2007. All rights reserved ...

Page 38

... SPI diagrams for readout data, last bit during read. 4: POR ovrd diagram corrected. 6.6: update SPI timing. Objective data sheet Rev. 00.11 — 30 January 2007 PCA2125 SPI Real time clock / calendar Change notice Supersedes - PCA2125_00. © NXP B.V. 2007. All rights reserved ...

Page 39

... Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. http://www.nxp.com salesaddresses@nxp.com Rev. 00.11 — 30 January 2007 PCA2125 SPI Real time clock / calendar © NXP B.V. 2007. All rights reserved ...

Page 40

... Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2007. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 30 January 2007 Document identifier: PCA2125_00 PCA2125 All rights reserved. ...

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