ad8366 Analog Devices, Inc., ad8366 Datasheet - Page 6

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ad8366

Manufacturer Part Number
ad8366
Description
Dc To 500 Mhz, Dual Digital Gain Trim Amplifier
Manufacturer
Analog Devices, Inc.
Datasheet

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AD8366
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Table 3. Pin Function Descriptions
Pin No.
1, 8, 13, 28
2, 3, 6, 7
4
5, 20
9, 32
10, 31
11, 30
12, 29
14, 15, 26, 27
16, 17
18, 19, 21, 22, 23, 24
25
Mnemonic
VPSIA, VPSIB,
VPSOA, VPSOB
IPPA, IPMA,
IPPB, IPMB
ENBL
ICOM, OCOM
DECA, DECB
OFSA, OFSB
CCMA, CCMB
VCMB, VCMA
OPPB, OPMB,
OPMA, OPPA
DENB, DENA
BIT5, BIT4, BIT3,
BIT2, BIT1, BIT0
SENB
VPSIB
VPSIA
ENBL
ICOM
IPMB
IPMA
IPPB
IPPA
Description
Input and Output Stage Positive Supply Voltage. 4.5 V − 5.5 V.
Differential Inputs
Chip Enable. Pull high to enable.
Input and Output Stage Common. Connect via lowest possible impedance to external circuit
common
Vpos/2 Reference Output Decoupling. Connect decoupling capacitor to circuit common.
Output Offset Correction Loop Compensation. Connect capacitor to circuit common. Tie to
common to disable.
Output Common-mode Centering Loop Compensation. Connect capacitor to circuit common
Output Common-mode Setpoint. Defaults to Vpos/2 if left open
Differential Outputs
Data enable . Pull high to address each or both channels for parallel load. Not used in serial mode.
Parallel data path for SENB pulled low. For SENB pulled high, BIT0 becomes a chip-select (CS), BIT1
becomes serial data input, SDAT, and BIT2 becomes serial clock, SCLK. BIT3-BIT5 are not used in
the serial mode
Serial interface enable. Pull high for serial; pull low for parallel.
1
2
3
4
5
6
7
8
AD8366
TOP VIEW
Figure 2. Pin Configuration
Rev. PrC | Page 6 of 13
24
23
22
21
20
19
18
17
BIT0/CS
BIT1/SDAT
BIT2/SCLK
OCOM
DENA
Preliminary Technical Data
BIT3
BIT4
BIT5

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