pcf8536 NXP Semiconductors, pcf8536 Datasheet - Page 17

• Manufacturer Part Number: pcf8536
• Description: Universal Lcd Driver For Low Multiplex Rates Including A 6 Channel Pwm Generator
• Manufacturer: NXP Semiconductors

NXP Semiconductors
PCF8536
Product data sheet
When EFR is set to 230 kHz, then the LCD frame frequency is calculated with
where q is the frequency divide factor (see
Remark: f
When the internal oscillator is used, the intermediate frequency may be output on the
OSCCLK pin. Its frequency is given in
Table 21.
[1]
[2]
f
FD[4:0]
00000
00001
00010
00011
00100
00101
00110
00111
01000
01001
01010
01011
01100
01101
01110
01111
10000
10001
10010
10011
10100
10101
10110
10111 to 11111
fr LCD

Nominal frame frequency calculated for the default clock frequency of 230 kHz.
Default value.
[2]

=
clk(ext)
f
---------------- -
Frame frequency prescaler values for 230 kHz clock operation
clk ext
48 q 

All information provided in this document is subject to legal disclaimers.
is the external input clock frequency to pin OSCCLK.

Universal LCD low multiplex driver with 6 channel PWM generator
Nominal LCD frame
frequency (Hz)
59.9
70.5
79.9
90.4
99.8
108.9
119.8
129.5
140.9
149.7
159.7
171.1
177.5
191.7
199.7
208.3
217.8
228.3
239.6
252.2
266.2
281.9
299.5
not used
Rev. 1 — 6 October 2011
[1]
Table
Table
21.
Divide factor, q
80
68
60
53
48
44
40
37
34
32
30
28
27
25
24
23
22
21
20
19
18
17
16
21).
Intermediate clock
frequency (Hz)
2875
3382
3833
4340
4792
5227
5750
6216
6765
7188
7667
8214
8519
9200
9583
10000
10455
10952
11500
12105
12778
13529
14375
PCF8536
© NXP B.V. 2011. All rights reserved.
Equation
17 of 74
(2)
2: