pca85132 NXP Semiconductors, pca85132 Datasheet - Page 5

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pca85132

Manufacturer Part Number
pca85132
Description
Lcd Driver For Low Multiplex Rates
Manufacturer
NXP Semiconductors
Datasheet

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NXP Semiconductors
PCA85132_1
Product data sheet
6.2 Pin description
Table 3.
[1]
[2]
Symbol
SDAACK
SDA
SCL
CLK
V
SYNC
OSC
T1, T2 and T3
A0 and A1
SA0
V
V
BP2 and BP0
S0 to S79
BP0, BP2, BP1, and BP3
S80 to S159
BP3 and BP1
DD
SS
LCD
[2]
For most applications SDA and SDAACK are shorted together (see
The substrate (rear side of the die) is wired to V
[1]
[1]
Pin description
All information provided in this document is subject to legal disclaimers.
Rev. 01 — 6 May 2010
Pin
1 to 3
4 to 6
7 to 9
10
11 to 13
14
15
16, 17 and 18 to 20
21, 22
23
24 to 26
27 to 29
30, 31
32 to 111
112 to 115
116 to 195
196, 197
SS
but should not be electrically contacted.
Description
I
I
I
clock input and output
supply voltage
cascade synchronization input and output
selection of internal or external clock
application mode
subaddress inputs
I
ground supply voltage
LCD supply voltage
LCD backplane outputs
LCD segment outputs
LCD backplane outputs
LCD segment outputs
LCD backplane outputs
dedicated testing pins; to be tied to V
2
2
2
2
C-bus acknowledge output
C-bus serial data input
C-bus serial clock input
C-bus slave address input
LCD driver for low multiplex rates
Section
12.2).
PCA85132
© NXP B.V. 2010. All rights reserved.
SS
in
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