pca8533 NXP Semiconductors, pca8533 Datasheet - Page 24

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pca8533

Manufacturer Part Number
pca8533
Description
Universal Lcd Driver For Low Multiplex Rates
Manufacturer
NXP Semiconductors
Datasheet
NXP Semiconductors
PCA8533
Product data sheet
8.2 Command decoder
The command bytes and control bytes are also acknowledged by all addressed PCA8533
connected to the bus.
The display bytes are stored in the display RAM at the address specified by the data
pointer and the subaddress counter; see
The acknowledgement after each byte is made only by the (A0, A1, and A2) addressed
PCA8533. After the last (display) byte, the I
Alternatively a START may be asserted to RESTART an I
The command decoder identifies command bytes that arrive on the I
commands available to the PCA8533 are defined in
Table 10.
Table 11.
[1]
[2]
Command
mode-set
load-data-pointer
device-select
bank-select
blink-select
Bit
7 to 4
3
2
1 to 0
The possibility to disable the display allows implementation of blinking under external control.
Not applicable for static drive mode.
Symbol
-
E
B
M[1:0]
Definition of commands
Mode-set command bit description
All information provided in this document is subject to legal disclaimers.
1100
Value
0
1
0
1
01
10
11
00
Rev. 1 — 27 April 2011
Operation code
1
0
1
1
1
1
P[6:0]
1
1
1
Description
fixed value
display status
the possibility to disable the display allows implementation of
blinking under external control
LCD bias configuration
LCD drive mode selection
disabled (blank)
enabled
1
1
static; 1 backplane
1:2 multiplex; 2 backplanes
1:3 multiplex; 3 backplanes
1:4 multiplex; 4 backplanes
3
2
0
1
1
1
bias
bias
Section 7.11
Universal LCD driver for low multiplex rates
2
0
0
1
1
C-bus master asserts a STOP condition (P).
[1]
E
0
1
0
Table
and
[2]
2
B
A[2:0]
0
AB
10.
C-bus access.
Section
M[1:0]
I
BF[1:0]
7.12.
2
C-bus. The five
PCA8533
© NXP B.V. 2011. All rights reserved.
O
Reference
Table 11
Table 12
Table 13
Table 14
Table 15
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