m41t93 STMicroelectronics, m41t93 Datasheet - Page 28
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m41t93
Manufacturer Part Number
m41t93
Description
Serial Spi Bus Rtc With Battery Switchover
Manufacturer
STMicroelectronics
Datasheet
1.M41T93.pdf
(51 pages)
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3.6
Note:
28/51
Optional second programmable alarm
When the Alarm 2 Enable (AL2E) Bit (D1 of address 13h) is set to a logic ‘1,’ registers 14h
through 18h provide control for a second programmable alarm which operates in the same
manner as the alarm function described above.
The AL2E Bit defaults on initial power-up to a logic ‘0’ (Alarm 2 disabled). In this mode, the
five address bytes (14h-18h) function as additional user SRAM, for a total of 12 bytes of
user SRAM.
Figure 14. Alarm interrupt reset waveform
Figure 15. Back-up mode alarm waveform
ABE and A1IE Bits = 1.
Table 6.
V CC
IRQ/FT/OUT
V PFD
V SO
AF x Bits in Flags
Register
RPT5
ALARM FLAG BITS (AF x )
IRQ/FT/OUT
1
1
1
1
1
0
RPT4
Alarm repeat modes
1
1
1
1
0
0
0Eh
RPT3
1
1
1
0
0
0
HIGH-Z
RPT2
1
1
0
0
0
0
RPT1
1
0
0
0
0
0
0Fh
Once per Second
Once per Minute
Once per Month
Once per Hour
Alarm setting
Once per Year
Once per Day
HIGH-Z
00h
trec
AI11823
AI11824