m41t93 STMicroelectronics, m41t93 Datasheet - Page 35

• Manufacturer Part Number: m41t93
• Description: Serial Spi Bus Rtc With Battery Switchover
• Manufacturer: STMicroelectronics

3.15
Table 13.
1. All other control bits power-up in an undetermined state.
2. BMB0-BMB4, RB0, RB1
3. With battery back-up
4. UC = Unchanged
Table 14.
1. All other control bits power-up in an undetermined state.
2. With battery back-up
3. UC = Unchanged
3.16
Initial
Power-up
Subsequent
Power-up
Initial
Power-up
Subsequent
Power-up
Condition
Condition
(3)(4)
(2)(3)
(1)
(1)
Initial power-on defaults
Upon initial application of power to the device, the register bits will initially power-on in the
state indicated in
Initial power-on default values (part 1)
Initial power-up default values (part 2)
OTP bit operation (SOX18 package only)
When the OTP (One Time Programmable) Bit is set to a '1,' the value in the internal OTP
registers will be transferred to the analog calibration register (12h) and are “Read only.” The
OTP value is programmed by the manufacturer, and will contain the calibration value
necessary to achieve ±5 ppm at room temperature after two SMT reflows. This clock
accuracy can be guaranteed to drift no more than ±3 ppm the first year, and ±1 ppm for
each following year due to crystal aging.
If the OTP Bit is set to '0,' the analog calibration register will become a WRITE/READ
register and function like standard SRAM memory cells, allowing the user to implement any
desired value of analog calibration.
When the user sets the OTP Bit, they need to wait for approximately 8ms before the analog
registers transfer the value from the OTP to the analog registers due to the OTP Read
operation.
UC
ST
RPT11-15
0
UC
0
CB1 CB0 OUT FT
UC
0
UC
HT
0
1
1
Table 13
UC
OF
UC
1
1
TE
0
0
0
0
and
DCS
ACS
TI/TP
UC
0
UC
Table
0
Digital
Calib.
14.
UC
TIE
UC
0
0
TD1 TD0 RS0 RS1-3 OTP
UC
Analog
Calib.
1
UC
0
UC
1
OFIE Watchdog
UC
0
UC
1
UC
0
0
0
(2)
UC
0
A1IE SQWE ABE
UC
0
RPT21-
UC
25
0
UC
1
AL2E
UC
35/51
0
UC
0