max5961 Maxim Integrated Products, Inc., max5961 Datasheet - Page 33

• Manufacturer Part Number: max5961
• Description: 0 To 16v, Quad, Hot-swap Controller With 10-bit Current And Voltage Monitor
• Manufacturer: Maxim Integrated Products, Inc.

The five digital comparators per hot-swap channel
(undervoltage/overvoltage warning and critical, over-
current warning) all have a user-selectable deglitching
feature that requires two consecutive positive com-
pares before the MAX5961 takes action as determined
Table 39. UV Warning and Critical Comparators Deglitch Enable Register Format
Table 40. OV Warning and Critical Comparators Deglitch Enable Register Format
Table 38. OC Warning Comparators Deglitch Enable Register Format
Description:
Register Title:
Register Address:
Ch4_dgl_ov2 Ch4_dgl_ov1 Ch3_dgl_ov2 Ch3_dgl_ov1
Description:
Register Title:
Register Address:
Description:
Register Title:
Register Address:
Ch4_dgl_uv2 Ch4_dgl_uv1 Ch3_dgl_uv2
bit 7
R/W
bit 7
bit 7
R/W
R/W
Deglitching of Digital Comparators
______________________________________________________________________________________
bit 6
bit 6
R/W
R/W
bit 6
R/W
with 10-Bit Current and Voltage Monitor
Deglitch enable register for undervoltage warning and critical digital comparators
dgl_uv
0x6B
Deglitch enable register for overvoltage warning and critical digital comparators
dgl_ov
0x6C
0 to 16V, Quad, Hot-Swap Controller
Deglitch enable register for overcurrent warning digital comparators
dgl_i
0x6A
bit 5
bit 5
R/W
R/W
bit 5
R/W
Ch3_dgl_uv1
bit 4
bit 4
R/W
bit 4
R/W
R/W
Ch2_dgl_uv2 Ch2_dgl_uv1 Ch1_dgl_uv2 Ch1_dgl_uv1
Ch2_dgl_ov2 Ch2_dgl_ov1 Ch1_dgl_ov2
Ch4_dgl_i
bit 3
R/W
bit 3
bit 3
R/W
R/W
by the particular compare and the setting of the PROT
input.
The deglitching function is enabled or disabled per
comparator by registers dgl_i, dgl_uv, and dgl_ov
(Tables 38, 39, and 40). Writing a 1 to the appropriate
bit location in these registers enables the deglitch func-
tion for the corresponding digital comparator.
Ch3_dgl_i
R/W
bit 2
bit 2
bit 2
R/W
R/W
Ch2_dgl_i
bit 1
R/W
bit 1
R/W
bit 1
R/W
Ch1_dgl_ov1
Ch1_dgl_i
bit 0
bit 0
R/W
R/W
bit 0
R/W
VALUE
RESET
VALUE
VALUE
RESET
RESET
0x00
0x00
0x00
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