tda8752b-03 NXP Semiconductors, tda8752b-03 Datasheet - Page 29

• Manufacturer Part Number: tda8752b-03
• Description: Tda8752b Triple High-speed Analog-to-digital Converter 110 Msps
• Manufacturer: NXP Semiconductors

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Philips Semiconductors
9397 750 07338
Product specification
Fig 11. Data timing diagram.
Fig 12. Timing diagram and test conditions of 3-state output delay time.
handbook, full pagewidth
Effective bits are obtained via a Fast Fourier Transform (FFT) treatment taking 8000 acquisition points per equivalent fundamental
period. The calculation takes into account all harmonics and noise up to half clock frequency (NYQUIST frequency).
Conversion-to-noise ratio: S/N = EB
Output data acquisition is available after the maximum delay time t
timings are given for a 10 pF capacitive load. A higher load can be used but the timing must then be rechecked.
The input current must be limited in accordance with the limiting values.
The I
f
OE
2
= 100 kHz; switch S1 connected to V
C-bus timings are given for a frequency of 100 kbit/s (100 kHz). This bus can be used at a frequency of 400 kbit/s (400 kHz).
output
output
data
data
OE
V CCD
t dLZ
DATA
R0 to R7, ROR
G0 to G7, GOR
B0 to B7, BOR
CKADCO
LOW
V in
10%
6.02 + 1.76 dB.
n
I n
CCD
t CPH
sample N
HIGH
1
t d(s)
for t
t dZL
dLZ
Rev. 03 — 21 July 2000
and t
sample N
50%
I n
dZL
t dHZ
Triple high-speed Analog-to-Digital Converter 110 Msps
; switch S1 connected to GND for t
HIGH
1
d(o)
t CPL
, which is the time during which the data is available. All the
I n
sample N
90%
1
t d(o)
t h(o)
TDA8752B
2
OE
LOW
I n
50%
t dZH
2
50 % = 1.4 V
dHZ
10 pF
3.3 k
50%
and t
FCE475
© Philips Electronics N.V. 2000. All rights reserved.
2.4 V
1.4 V
0.4 V
dZH
S1
TDA8752B
.
V CCD
FCE476
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