tda8366h NXP Semiconductors, tda8366h Datasheet - Page 21
![no-image](/images/manufacturer_photos/0/4/487/nxp_semiconductors_sml.jpg)
tda8366h
Manufacturer Part Number
tda8366h
Description
I2c-bus Controlled Pal/ntsc Tv Processor
Manufacturer
NXP Semiconductors
Datasheet
1.TDA8366H.pdf
(48 pages)
- Current page: 21 of 48
- Download datasheet (324Kb)
Philips Semiconductors
January 1995
L
V
V
Z
V
I
I
Chrominance filters
C
f
QF
SR
C
f
QBP
Delay line and peaking circuit
Y
t
t
B
P
f
t
OS
C
S
G
Horizontal synchronization circuits
S
V
SL
SL
clamp
i
trap
c
d
d1
c(p)
W
UMINANCE INPUTS AND OUTPUTS
o
26(p-p)
TS
25(p-p)
EAKING CONTROL
YNC VIDEO INPUT
9,11,15
SYMBOL
HROMINANCE TRAP CIRCUIT
HROMINANCE BANDPASS CIRCUIT
ORING STAGE
I
processor
W
DELAY LINE
2
HS
VS
C-bus controlled PAL/NTSC TV
output signal amplitude
(peak-to-peak value)
top sync level
output impedance
input signal amplitude
(peak-to-peak value)
clamp current
input current
trap frequency
trap quality factor
colour subcarrier rejection
centre frequency
bandpass quality factor
delay time
tuning range delay time
bandwidth of internal delay line
peaking centre frequency
width of preshoot or overshoot
overshoot
peaking control curve
coring range
wave gain
sync pulse amplitude
slicing level for horizontal sync
slicing level for vertical sync
; note 17
(
PINS
PARAMETER
9, 11
AND
(
PINS
15)
25
AND
26)
top sync-white
during burst key pulse
no clamp
note 16
note 6
8 steps
note 6
note 2
positive
negative
16 steps
note 2
note 18
negative half wave gain
------------------------------------------------------------- -
positive half wave gain
CONDITIONS
21
20
5
50
160
MIN.
see Fig.5
0.45
2.5
250
0.45
200
f
2
f
3
480
3
160
20
36
15
1.8
300
50
30
osc
osc
TYP.
Objective specification
0.63
0.5
+160
TDA8366
MAX.
V
V
V
MHz
dB
MHz
ns
ns
MHz
MHz
ns
%
%
IRE
mV
%
%
UNIT
A
A
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