uda1338h-n1 NXP Semiconductors, uda1338h-n1 Datasheet - Page 23

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uda1338h-n1

Manufacturer Part Number
uda1338h-n1
Description
Multichannel Audio Coder-decoder
Manufacturer
NXP Semiconductors
Datasheet
Philips Semiconductors
Table 19:
[1]
11. Register mapping
9397 750 14389
Product data sheet
S 0011 000 0
Device
address
acknowledge from UDA1338H
Auto increment of register address.
Master transmitter reads from the UDA1338H registers in the I
R/
W
11.1 Address mapping
A ADDR
Register
address
In this chapter the register addressing and mapping of the microcontroller interface of the
UDA1338H is given.
In
In
in
Table 20:
Address
System settings
00h
01h
02h
Status (read out registers)
0Fh
Interpolator settings
10h
11h
4. After this the microcontroller writes the 8-bit register address (ADDR) where the
5. The UDA1338H acknowledges this register address.
6. Then the microcontroller generates a repeated start (Sr).
7. Then the microcontroller generates the device address ‘0011 000’ again, but this time
8. The UDA1338H sends 2 bytes data with the Most Significant (MS) byte first and then
9. If repeated groups of 2 bytes are transmitted, then the register address is auto
10.The microcontroller stops this cycle by generating a negative acknowledge (NA).
11.Finally, the UDA1338H frees the I
Section 11.3
Table 20
Table 21
reading of the register content of the UDA1338H must start.
followed by a logic 1 (read) of the R/W bit. An acknowledge is followed from the
UDA1338H.
the Least Significant (LS) byte. After each byte an acknowledge is followed from the
microcontroller (master).
incremented. After each byte an acknowledge is followed from the microcontroller.
condition (P).
A Sr 0011 000 1
Overview of register mapping
an overview of the register mapping is given.
the actual register mapping is given and the register definitions are explained
Device
address
to
Section
Rev. 03 — 16 February 2005
R/
W
11.14.
A MS1
data 1
acknowledge from master
2
C-bus and the microcontroller can generate a stop
A LS1
Function
system
audio ADC and DAC subsystem
voice ADC system
status outputs
DAC channel and feature selection
DAC feature control
A MS2 A LS2
2
C-bus mode
DATA 2
Multichannel audio coder-decoder
[1]
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
A MSn A LSn
UDA1338H
DATA n
[1]
NA P
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