uda1355h-n2 NXP Semiconductors, uda1355h-n2 Datasheet - Page 22
uda1355h-n2
Manufacturer Part Number
uda1355h-n2
Description
Stereo Audio Codec With Spdif Interface
Manufacturer
NXP Semiconductors
Datasheet
1.UDA1355H-N2.pdf
(76 pages)
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Philips Semiconductors
2003 Apr 10
MODE
2
3
4
Stereo audio codec with SPDIF interface
Data path:
Features:
Data path:
Features:
Data path:
Features:
Input SPDIF to outputs I
SPDIFOUT via loop through
Input I
Possibility to process input SPDIF via
I
then to output DAC
System locks onto the SPDIF input
signal
I
are master
Microcontroller mode: see Section 8.4.
Input ADC to outputs I
Crystal oscillator generates the clocks
Microcontroller mode:
– PGA gain setting
– Volume control in decimator setting
– SPDIF output channel status bits
Input ADC to output I
Input I
Possibility to process input ADC via
I
to outputs DAC or SPDIF
Crystal oscillator generates the clocks
I
are master
Microcontroller mode: see Section 8.4.
2
2
2
2
S-bus using an external DSP and
S input and output with BCK and WS
S-bus using a external DSP and then
S input and output with BCK and WS
(two times 40 bits) setting.
2
2
S to output DAC.
S to outputs DAC or SPDIF.
FEATURES
2
S
2
S or SPDIF.
2
S or
22
ADC
ADC
I
2
S INPUT
XTAL
XTAL
I
2
S INPUT
I
(e.g. equalizing, spatializing)
2
SPDIF IN
S slave
(e.g. equalizing, spatializing)
I
2
S slave
EXTERNAL DSP
EXTERNAL DSP
(SAA7715)
SCHEMATIC
(SAA7715)
PLL
I
2
I
SPDIF OUT
2
S OUTPUT
I
MGU838
S OUTPUT
SPDIF OUT
2
SPDIF LOCK
S OUTPUT
MGU840
Preliminary specification
DAC
I
2
DAC
S master
I
MGU839
2
S master
UDA1355H
MUTE
SPDIFOUT
I
2
MUTE
S master
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