pca9633 NXP Semiconductors, pca9633 Datasheet - Page 29

• Manufacturer Part Number: pca9633
• Description: Pca9633 4-bit Fm+ I2c-bus Led Driver
• Manufacturer: NXP Semiconductors

NXP Semiconductors
[5]
[6]
[7]
PCA9633_3
Product data sheet
Fig 23. Definition of timing
Fig 24. I
A master device must internally provide a hold time of at least 300 ns for the SDA signal (refer to the V
bridge the undefined region of SCL’s falling edge.
The maximum t
250 ns. This allows series protection resistors to be connected between the SDA and the SCL pins and the SDA/SCL bus lines without
exceeding the maximum specified t
Input filters on the SDA and SCL inputs suppress noise spikes less than 50 ns.
SDA
SCL
Rise and fall times refer to V
2
C-bus timing diagram
P
protocol
SDA
SCL
t
BUF
f
for the SDA and SCL bus lines is specified at 300 ns. The maximum fall time (t
S
t
SU;STA
t
BUF
condition
START
t
HD;STA
(S)
t
LOW
t
HD;STA
IL
f
.
and V
t
LOW
t
r
t
t
r
HD;DAT
MSB
bit 7
(A7)
IH
.
t
HIGH
Rev. 03 — 20 December 2006
t
SU;DAT
t
f
t
1
HIGH
/f
bit 6
(A6)
SCL
t
HD;DAT
t
f
t
SU;DAT
bit 7
(D1)
t
VD;DAT
Sr
bit 8
(D0)
t
SU;STA
t
VD;ACK
t
HD;STA
acknowledge
f
) for the SDA output stage is specified at
4-bit Fm+ I
(A)
t
SU;STO
IL
002aab285
of the SCL signal) in order to
t
SP
condition
STOP
t
SU;STO
PCA9633
2
(P)
© NXP B.V. 2006. All rights reserved.
C-bus LED driver
002aaa986
P
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